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LTC4267CDHC датащи(PDF) 26 Page - Linear Integrated Systems |
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LTC4267CDHC датащи(HTML) 26 Page - Linear Integrated Systems |
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26 / 32 page ![]() LTC4267 26 4267fc transformer voltage is higher than the PSE voltage, the LTC4267 switching regulator will draw power from the transformer. In this situation, it is necessary to address the issue of power cycling that may occur if a PSE is present. The PSE will detect the PD and apply power. If the switcher is being powered by the wall transformer, then the PD will not meet the minimum load requirement and the PSE will subsequently remove power. The PSE will again detect the PD and power cycling will start. With a transformer voltage above the PSE voltage, it is necessary to either disable the signature, as shown in option 2, or install a minimum load on the output of the LTC4267 interface to prevent power cycling. The third option also applies power directly to the LTC4267 switching regulator, bypassing the LTC4267 interface controller and omitting diode D9. With the diode omit- ted, the transformer voltage is applied to the LTC4267 interface controller in addition to the switching regulator. For this reason, it is necessary to ensure that the trans- former maintain the voltage between 38V and 57V to keep the LTC4267 interface controller in its normal operating range. The third option has the advantage of automatically disabling the 25kΩ signature resistor when the external voltage exceeds the PSE voltage. Power-Up Sequencing the LTC4267 The LTC4267 consists of two functional cells, the PD interface and the switching regulator, and the power up sequencing of these two cells must be carefully considered. The PD designer should ensure that the switching regulator does not begin operation until the interface has completed charging up the load capacitor. This will ensure that the switcher load current does not compete with the load capacitor charging current provided by the PD interface current limit circuit. Overlooking this consideration may result in slow power supply ramp up, power-up oscillation, and possibly thermal shutdown. The LTC4267 includes a power good signal in the PD inter- face that can be used to indicate to the switching regulator that the load capacitor is fully charged and ready to handle the switcher load. Figure 7 shows two examples of ways the ⎯P⎯W⎯R⎯G⎯D signal can be used to control the switching regulator. The first example employs an N-channel MOSFET to drive the ITH/RUN port below the shutdown threshold (typically 0.28V). The second example drives PVCC below the PVCCturn-offthreshold.Employingthesecondexample has the added advantage of adding delay to the switching regulator start-up beyond the time the power good signal becomes active. The second example ensures additional timing margin at start-up without the need for added delay components. In applications where it is not desirable to utilize the power good signal, sufficient timing margin can be achieved with RSTART and CPVCC. RSTART and CPVCC should be set to a delay of two to three times longer than the duration needed to charge up C1. Layout Considerations for the LTC4267 The most critical layout considerations for the LTC4267 are the placement of the supporting external components associated with the switching regulator. Efficiency, stability, and load transient response can deteriorate without good layout practices around critical components. For the LTC4267 switching regulator, the current loop through C1, T1 primary, Q1, and RSENSE must be given careful layout attention. (Refer to Figure 11.) Because of the high switching current circulating in this loop, these components should be placed in close proximity to each other. In addition, wide copper traces or copper planes should be used between these components. If vias are necessary to complete the connectivity of this loop, placing multiple vias lined perpendicular to the flow of current is essential for minimizing parasitic resistance and reducing current density. Since the switching frequency and the power levels are substantial, shielding and high frequency layout techniques should be employed. A low current, low impedance alternate connection should be employed between the PGND pins of the LTC4267 and the PGND side of RSENSE, away from the high current loop. This Kelvin sensing will ensure an accurate representation of the sense voltage is measured by the LTC4267. The placement of the feedback resistors R1 and R2 as well as the compensation capacitor CC is very important in the accuracy of the output voltage, the stability of the main control loop, and the load transient response. In an isolated design application, R1, R2, and CC should be placed as close as possible to the error amplifier’s input APPLICATIO S I FOR ATIO |
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