LTC4267CDHC datasheet(14/32 Pages) LINEAR

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LTC4267

4267fc

PWRGD

5µF

MIN

VPORTN

POUT

1.125V

300k

100k

LTC4267

THERMAL SHUTDOWN

UVLO

4267 F06

PSE

–

ITH/RUN

PGND

the LTC4267 will attempt to quickly charge capacitor C1

using an internal secondary current limit circuit. In this

scenario, the PSE current limit should provide the overall

limit for the circuit. For slower rising inputs, the 375mA

current limit in the LTC4267 will set the charge rate of the

capacitor C1. In either case, the ⎯P⎯W⎯R⎯G⎯D signal may go

inactive brieﬂy while the capacitor is charged up to the

new line voltage. In the design of a PD, it is necessary

to determine if a step in the input voltage will cause the

⎯P⎯W⎯R⎯G⎯D signal to go inactive and how to respond to this

event. In some designs, it may be desirable to ﬁlter the

⎯P⎯W⎯R⎯G⎯D signal so that intermittent power bad conditions

are ignored. Figure 7 demonstrates a method to insert a

lowpass ﬁlter on the power good interface.

For PD designs that use a large load capacitor and also

consume a lot of power, it is important to delay activation

of the switching regulator with the ⎯P⎯W⎯R⎯G⎯D signal. If the

regulator is not disabled during the current-limited turn-on

sequence, the PD circuitry will rob current intended for

charging up the load capacitor and create a slow rising

input, possibly causing the LTC4267 to go into thermal

shutdown.

The ⎯P⎯W⎯R⎯G⎯D pin connects to an internal open drain, 100V

transistor capable of sinking 1mA. Low impedance to

VPORTN indicates power is good. ⎯P⎯W⎯R⎯G⎯D is high imped-

ance during signature and classiﬁcation probing and in

the event of a thermal overload. During turn-off, ⎯P⎯W⎯R⎯G⎯D

is deactivated when the input voltage drops below 30V.

In addition, ⎯P⎯W⎯R⎯G⎯D may go active brieﬂy at turn-on for

fast rising input waveforms. ⎯P⎯W⎯R⎯G⎯D is referenced to the

VPORTN pin and when active, will be near the VPORTN po-

tential. Connect the ⎯P⎯W⎯R⎯G⎯D pin to the switching regulator

circuitry as shown in Figure 7.

Figure 6. LTC4267 Power Good

APPLICATIO S I FOR ATIO

Figure 7. Power Good Interface Examples

PD Interface Thermal Protection

The LTC4267 PD Interface includes thermal overload

protection in order to provide full device functionality

in a miniature package while maintaining safe operat-

ing temperatures. Several factors create the possibility

of signiﬁcant power dissipation within the LTC4267. At

turn-on, before the load capacitor has charged up, the

instantaneous power dissipated by the LTC4267 can be

as much as 10W. As the load capacitor charges up, the

power dissipation in the LTC4267 will decrease until it

reaches a steady-state value dependent on the DC load

current. The size of the load capacitor determines how

fast the power dissipation in the LTC4267 will subside. At

room temperature, the LTC4267 can typically handle load

capacitors as large as 800µF without going into thermal

shutdown. With large load capacitors, the LTC4267 die

temperature will increase by as much as 50°C during a

single turn-on sequence. If for some reason power were

removed from the part and then quickly reapplied so that

the LTC4267 had to charge up the load capacitor again, the

temperature rise would be excessive if safety precautions

were not implemented.

The LTC4267 PD interface protects itself from thermal

damage by monitoring the die temperature. If the die

4267 F07

LTC4267

VPORTN

POUT

PGND

VPORTP

ITH/RUN

PSE

–48V

5µF

100V

ALTERNATE ACTIVE-HIGH ENABLE FOR PVCC PIN

SEE APPLICATIONS INFORMATION SECTION

ACTIVE-HIGH ENABLE FOR RUN PIN WITH INTERNAL PULL-UP

R18

10k

100k

MMBD4148

C15

0.047µF

FMMT2222

LTC3803

GND

OPTIONAL

AUXILIARY

SWITCHING

REGULATOR

PWRGD

PGND

LTC4267

VPORTN

POUT

PGND

VPORTP

PVCC

PSE

–48V

5µF

100V

R18

10k

100k

MMBD4148

C15

0.047µF

FMMT2222

PWRGD

PGND

RSTART

CPVCC

C17

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