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AM79C982 датащи(PDF) 23 Page - Advanced Micro Devices |
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AM79C982 датащи(HTML) 23 Page - Advanced Micro Devices |
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23 / 26 page ![]() AMD PRELIMINARY 1–25 Am79C982 Note: When used in minimum mode. 19406B-13 X1 RST SHCK 1 2 12 16 20 CRS AUI TP1 TP0 24 28 32 10 TP3 TP2 STR AUI TP1 TP0 TP3 TP2 SO (Note) AUI AUI Figure 6. bIMR4 Management Port Minimum Mode and Port Activity Monitor Signal Relationship Port Activity Monitor Two pins, CRS and STR, are used to serially output the state of the internal Carrier Sense signals from the AUI and the eight (four) TP ports. This function together with external hardware and/or software can be used to moni- tor repeater receive and/or collision activity. The resolution of the CRS signal is 2 ms. The incoming data is sampled repeatedly during each 2 ms period. If any activity occurs (regardless of length) during any 2 ms period, this activity will be latched. At the start of the next 2 ms period, the bIMR device will examine the latches for each port. For any port in which activity occurred, the corresponding bit in the CRS output stream will remain set for the 2 ms period. This means that during any 2 ms time interval the CRS output bit stream represents carrier activity that occurred in the preceding 2 ms period (see Figure 7). During the last 1000 ns of the 2 ms period, the CRS signal is reset to LOW. Figure 7 illustrates this by showing the output of the register in the recommended LED drive circuitry of Figure 8. The CRS pin is used to indicate carrier sense for all nine ports of the device (five for the Am79C982-4). This pin outputs a ten bit stream that repeats every microsecond. During this period there are ten bit times (100 ns). Each port has a “time slot” in this repeating bit stream (see Figure 4). For example, activity on the AUI port is repre- sented by the state of the CRS pin during the second 100 ns period of the one microsecond cycle. Because the one microsecond sequence is repeated unchanged for most of the longer 2 ms cycle, any LED driven by the latch and shift register shown in Figure 3 and 5 will remain on for at least 2 ms. This minimizes the need for external pulse stretching logic. 1000 ns 2 ms TPX or AUI CRS 19406B-14 Figure 7. Carrier Sense Signal Output Corresponding to the States of AUI or Twisted-Pair Port Activity |
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