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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM79C976 датащи(PDF) 147 Page - Advanced Micro Devices |
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AM79C976 датащи(HTML) 147 Page - Advanced Micro Devices |
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147 / 309 page  8/01/00 Am79C976 147 P R E L I M INARY DELAYED_INT: Delayed Interrupts Register Offset 0C0h The contents of this register are cleared to 0 when the RST pin is asserted, before the serial EEPROM is read, and after a serial EEPROM read error. Table 52. DELAYED_INT: Delayed Interrupts Register EEPROM_ACC: EEPROM Access Register Offset 17Ch The contents of this register are set to default values when the RST pin is asserted. The register is not cleared at the start of a serial EEPROM read operation or after a serial EEPROM read error. The default value for all bits in this register is 0. This register is an alias of BCR19. Bit Name Description 31-21 RES Reserved. Written as 0, read as undefined. 20-16 EVENT_COUNT This field indicates the maximum number of receive and/or transmit interrupt events (RINT and/ or TINT) that can occur before a delayed interrupt signal occurs. 15-11 RES Reserved. Written as 0, read as undefined. 10-0 MAX_DELAY This field indicates the maximum time (measured in units of 10 microseconds) that can elapse after an interrupt event before a delayed interrupt signal occurs. |
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