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AM79C976 датащи(PDF) 197 Page - Advanced Micro Devices

номер детали AM79C976
подробное описание детали  PCnet-PRO??10/100 Mbps PCI Ethernet Controller
PDF  309 Pages
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производитель  AMD [Advanced Micro Devices]
домашняя страница  http://www.amd.com
Logo AMD - Advanced Micro Devices

AM79C976 датащи(HTML) 197 Page - Advanced Micro Devices

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8/01/00
Am79C976
197
P R E L I M INARY
Bus Configuration Registers
The Bus Configuration Registers (BCRs) are included
for compatibility with older PCnet Family software All
BCR functions can be accessed more efficiently
through the memory-mapped registers.
BCRs are used to program the configuration of the bus
interface and other special features of the Am79C976
controller that are not related to the IEEE 8802-3 MAC
functions. The BCRs are accessed by first setting the
appropriate RAP value and then by performing a slave
access to the BDP. See Table 89.
All BCR registers are 16 bits in width in Word I/O mode
(DWIO = 0, BCR18, bit 7) and 32 bits in width in DWord
I/O mode (DWIO = 1). The upper 16 bits of all BCR reg-
isters is undefined when in DWord I/O mode. These
bits should be written as zeros and should be treated
as undefined when read. The default value given for
any BCR is the value in the register after H_RESET.
Some of these values may be changed shortly after
H_RESET when the contents of the external EEPROM
is automatically read in. None of the BCR register val-
ues are affected by the assertion of the STOP bit or
S_RESET.
Note that several registers have no default value.
BCR0, BCR1, BCR3, BCR8, BCR10-17, and BCR21
are reserved and have undefined values. BCR2 and
BCR34 are not observable without first being pro-
grammed through the EEPROM read operation or a
user register write operation.
BCR0, BCR1, BCR16, BCR17, and BCR21 are regis-
ters that are used by other devices in the PCnet family.
Writing to these registers have no effect on the opera-
tion of the Am79C976 controller.
Writes to those registers marked as “Reserved” will
have no effect. Reads from these locations will produce
undefined values.
Table 89.
BCR Registers
RAP
Mnemonic
Default
Name
Programmability
User
EEPROM
0
MSRDA
0005h
Reserved
No
No
1
MSWRA
0005h
Reserved
No
No
2
MC
0000h
Miscellaneous Configuration
Yes
Yes
3
Reserved
N/A
Reserved
No
No
4
LED0
00C0h
LED0 Status
Yes
Yes
5
LED1
0094h
LED1 Status
Yes
Yes
6
LED2
1080h
LED2 Status
Yes
Yes
7
LED3
0081h
LED3 Status
Yes
Yes
8
Reserved
N/A
Reserved
No
No
9
FDC
0004h
Full-Duplex Control
Yes
Yes
10-15
Reserved
N/A
Reserved
No
No
16
IOBASEL
N/A
Reserved
No
No
17
IOBASEU
N/A
Reserved
No
No
18
BSBC
9000h
Burst and Bus Control
Yes
Yes
19
EECAS
0000h
EEPROM Control and Status
Yes
No
20
SWS
0000h
Software Style
Yes
No
21
Reserved
N/A
Reserved
No
No
22
PCILAT
1818h
PCI Latency
Yes
Yes
23
PCISID
0000h
PCI Subsystem ID
No
Yes
24
PCISVID
0000h
PCI Subsystem Vendor ID
No
Yes



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