AM79C976 datasheet(201/309 Pages) AMD

201 / 309 page

8/01/00

Am79C976

201

P R E L I M INARY

Read/Write accessible. FDLSE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

PSE

Pulse Stretcher Enable. When

this bit is set, the LED illumination

time is extended for each new oc-

currence of the enabled function

for this LED output. A value of 0

disables the pulse stretcher.

Read/Write accessible. PSE is

set to 1 by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

LNKSE

Link Status Enable. When this bit

is set, a value of 1 will be passed

to the LEDOUT bit in this register

when in Link Pass state.

Read/Write accessible. LNKSE is

set to 1 by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

RCVME

Receive Match Status Enable.

When this bit is set, a value of 1 is

passed to the LEDOUT bit in this

tivity on the network that has

passed the address match func-

tion for this node. All address

matching modes are included:

physical, logical filtering, broad-

cast and promiscuous.

Read/Write accessible. RCVME

is cleared by H_RESET and is

not affected by S_RESET or set-

ting the STOP bit.

XMTE

Transmit Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

activity on the network.

Read/Write accessible. XMTE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

RES

Reserved location. Written and

read as zeros.

RCVE

Receive Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

tivity on the network.

Read/Write accessible. RCVE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

SFBDE

Start Frame/Byte Delimiter En-

able. When this bit is set, a value

of 1 is passed to the LEDOUT bit

in this register when the RXD[3:0]

pins are presenting the least sig-

nificant nibble of valid frame data.

Read/Write accessible. RCVE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

COLE

Collision Status Enable. When

this bit is set, a value of 1 is

passed to the LEDOUT bit in this

activity on the network.

Read/Write accessible. COLE is

cleared by H_RESET and is not

affected by S_RESET or setting

the STOP bit.

%&5 /(' 6WDWXV

BCR5 controls the function(s) that the LED1 pin dis-

plays. Multiple functions can be simultaneously en-

abled on this LED pin. The LED display will indicate the

logical OR of the enabled functions. BCR5 defaults to

transmit or receive activity (XMTE = 1 and RCVE = 1)

with pulse stretcher enabled (PSE = 1) and is fully pro-

grammable.

Note: When LEDPE (BCR2, bit 12) is set to 1, pro-

gramming of the LED1 Status register is enabled.

When LEDPE is cleared to 0, programming of the

LED1 register is disabled. Writes to this register will be

ignored.

Note: Bits 15-0 in this register are programmable

through the EEPROM.

Bit

Name

Description

31-16

RES

Reserved locations. Written as

zeros and read as undefined.

LEDOUT

This bit indicates the current

(non-stretched) value of the LED

output pin. A value of 1 in this bit

indicates that the OR of the en-

abled signals is true.

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