PIC14000 datasheet(21/153 Pages) MICROCHIP

21 / 153 page

Preliminary

DS40122B-page 21

PIC14000

4.2.2.5

PIR1 REGISTER

This register contains the individual ﬂag bits for the

Peripheral interrupts (Figure 4-7).

Note:

These bits will be set by the speciﬁed

condition,

even

the

corresponding

Interrupt Enable bit is cleared (interrupt

disabled) or the GIE bit is cleared (all

interrupts disabled). Before enabling an

interrupt, the user may wish to clear the

corresponding interrupt ﬂag, to ensure that

the program does not immediately branch

to the Peripheral Interrupt service routine.

FIGURE 4-7:

PIR1 REGISTER

CMIF

R/W

bit0

bit7

CMIF:

Programmable Reference Comparator Interrupt Flag

1 = The comparator output has tripped. This is a

0 = The interrupt did not occur

Unimplemented. Read as ‘0’

W: Writable

Readable

Unimplemented,

read as ‘0’

PIR1

Address:

0Ch

POR value: 00h

—

PBIF

I2CIF

RCIF

ADCIF

OVFIF

Unimplemented. Read as ‘0’

OVFIF: A/D counter Overflow Interrupt Flag

1 = An A/D counter overflow has occurred.

Must be cleared in software.

0 = An A/D counter overflow has not occurred

ADCIF: A/D Capture Interrupt Flag

1 = An A/D capture has occurred.

Must be cleared in software.

0 = An A/D capture has not occurred

RCIF:

PORTC Interrupt on Change Flag

1 = At least one RC<7:4> input changed.

Must be cleared in software.

0 =None of the RC<7:4> inputs have changed

I2CIF:

I2C

Port Interrupt Flag

1 = A transmission/reception is completed.

Must be cleared in software.

0 =Waiting to transmit/receive

PBIF:

External Pushbutton Interrupt Flag

1 = The external pushbutton interrupt has occurred

0 =The external pushbutton interrupt did not occur

on OSC1/PBTN. Note: This interrupt is not available

in HS mode.

level-sensitive interrupt.

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