PIC16 datasheet(42/418 Pages) MICROCHIP

42 / 418 page

PIC16(L)F1508/9

DS40001609C-page 42

 2011-2013 Microchip Technology Inc.

4.2

CONFIG1: CONFIGURATION WORD 1

R/P-1

U-1

FCMEN(1)

IESO(1)

CLKOUTEN

BOREN<1:0>(2)

—

bit 13

bit 8

R/P-1

CP(3)

MCLRE

PWRTE

WDTE<1:0>

FOSC<2:0>

bit 7

bit 0

Legend:

R = Readable bit

P = Programmable bit

U = Unimplemented bit, read as ‘1’

‘0’ = Bit is cleared

‘1’ = Bit is set

-n = Value when blank or after Bulk Erase

bit 13

FCMEN: Fail-Safe Clock Monitor Enable bit

1 = Fail-Safe Clock Monitor is enabled(1)

0 = Fail-Safe Clock Monitor is disabled

bit 12

IESO: Internal External Switchover bit(1)

1 = Internal/External Switchover (Two-Speed Start-up) mode is enabled

0 = Internal/External Switchover mode is disabled

bit 11

CLKOUTEN: Clock Out Enable bit

1 = CLKOUT function is disabled. I/O function on the CLKOUT pin

0 = CLKOUT function is enabled on the CLKOUT pin

bit 10-9

BOREN<1:0>: Brown-Out Reset Enable bits(2)

11 = BOR enabled

10 = BOR enabled during operation and disabled in Sleep

01 = BOR controlled by SBOREN bit of the BORCON register

00 = BOR disabled

bit 8

Unimplemented: Read as ‘1’

bit 7

CP: Code Protection bit(3)

1 = Program memory code protection is disabled

0 = Program memory code protection is enabled

bit 6

MCLRE: MCLR/VPP Pin Function Select bit

If LVP bit = 1:

This bit is ignored.

If LVP bit = 0:

1 =MCLR/VPP pin function is MCLR; Weak pull-up enabled.

0 =MCLR/VPP pin function is digital input; MCLR internally disabled; Weak pull-up under control of

WPUA3 bit.

bit 5

PWRTE: Power-Up Timer Enable bit

1 = PWRT disabled

0 = PWRT enabled

bit 4-3

WDTE<1:0>: Watchdog Timer Enable bits

11 = WDT enabled

10 = WDT enabled while running and disabled in Sleep

01 = WDT controlled by the SWDTEN bit in the WDTCON register

00 = WDT disabled

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