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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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DSPIC30F5015 датащи(PDF) 9 Page - Microchip Technology |
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DSPIC30F5015 датащи(HTML) 9 Page - Microchip Technology |
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9 / 236 page  © 2007 Microchip Technology Inc. DS70135E-page 7 dsPIC30F4011/4012 1.0 DEVICE OVERVIEW This document contains device-specific information for the dsPIC30F4011/4012 devices. The dsPIC30F devices contain extensive Digital Signal Processor (DSP) functionality within a high-performance, 16-bit microcontroller (MCU) architecture. Figure 1-1 and Figure 1-2 show device block diagrams for the dsPIC30F4011 and dsPIC30F4012 devices. FIGURE 1-1: dsPIC30F4011 BLOCK DIAGRAM Note: This data sheet summarizes features of this group of dsPIC30F devices and is not intended to be a complete reference source. For more information on the CPU, peripherals, register descriptions and general device functionality, refer to the “dsPIC30F Family Reference Manual” (DS70046). For more information on the device instruction set and programming, refer to the “dsPIC30F/ 33F Programmer’s Reference Manual” (DS70157). AN8/RB8 Power-up Timer Oscillator Start-up Timer POR/BOR Reset Watchdog Timer Instruction Decode and Control OSC1/CLKI MCLR VDD, VSS AN4/QEA/IC7/CN6/RB4 UART1, SPI1 Motor Control PWM Timing Generation CAN AN5/QEB/IC8/CN7/RB5 16 PCH PCL Program Counter ALU<16> 16 Address Latch Program Memory (48 Kbytes) Data Latch 24 24 24 24 X Data Bus IR I2C™ QEI AN6/OCFA/RB6 AN7/RB7 PCU PWM1L/RE0 PWM1H/RE1 PWM2L/RE2 PWM2H/RE3 PWM3L/RE4 10-Bit ADC Timers PWM3H/RE5 FLTA/INT0/RE8 U2TX/CN18/RF5 SCK1/RF6 Input Capture Module Output Compare Module EMUC1/SOSCO/T1CK/U1ARX/CN0/RC14 EMUD1/SOSCI/T2CK/U1ATX/CN1/RC13 PORTB C1RX/RF0 C1TX/RF1 PGC/EMUC/U1RX/SDI1/SDA/RF2 PGD/EMUD/U1TX/SDO1/SCL/RF3 PORTF PORTD 16 16 16 16 x 16 W Reg Array Divide Unit Engine DSP Decode ROM Latch 16 Y Data Bus Effective Address X RAGU X WAGU Y AGU EMUD3/AN0/VREF+/CN2/RB0 EMUC3/AN1/VREF-/CN3/RB1 AN2/SS1/CN4/RB2 AN3/INDX/CN5/RB3 OSC2/CLKO/RC15 U2RX/CN17/RF4 AVDD, AVSS UART2 16 16 16 16 16 PORTC PORTE 16 16 16 16 8 Interrupt Controller PSV & Table Data Access Control Block Stack Control Logic Loop Control Logic Data Latch Data Latch Y Data (1 Kbyte) RAM X Data (1 Kbyte) RAM Address Latch Address Latch Control Signals to Various Blocks EMUC2/OC1/IC1/INT1/RD0 EMUD2/OC2/IC2/INT2/RD1 OC3/RD2 OC4/RD3 16 Data EEPROM (1 Kbyte) 16 |
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