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DSPIC30F5015 датащи(PDF) 48 Page - Microchip Technology |
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DSPIC30F5015 датащи(HTML) 48 Page - Microchip Technology |
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48 / 236 page ![]() dsPIC30F4011/4012 DS70135E-page 46 © 2007 Microchip Technology Inc. 6.4 RTSP Operation The dsPIC30F Flash program memory is organized into rows and panels. Each row consists of 32 instruc- tions or 96 bytes. Each panel consists of 128 rows or 4K x 24 instructions. RTSP allows the user to erase one row (32 instructions) at a time and to program 32 instructions at one time. Each panel of program memory contains write latches that hold 32 instructions of programming data. Prior to the actual programming operation, the write data must be loaded into the panel write latches. The data to be programmed into the panel is loaded in sequential order into the write latches: instruction 0, instruction 1, etc. The addresses loaded must always be from a 32 address boundary. The basic sequence for RTSP programming is to set up a Table Pointer, then do a series of TBLWT instructions to load the write latches. Programming is performed by setting the special bits in the NVMCON register. 32 TBLWTL and 32 TBLWTH instructions are required to load the 32 instructions. All of the table write operations are single-word writes (2 instruction cycles) because only the table latches are written. After the latches are written, a programming operation needs to be initiated to program the data. The Flash program memory is readable, writable and erasable during normal operation over the entire VDD range. 6.5 RTSP Control Registers The four SFRs used to read and write the program Flash memory are: •NVMCON • NVMADR • NVMADRU • NVMKEY 6.5.1 NVMCON REGISTER The NVMCON register controls which blocks are to be erased, which memory type is to be programmed and the start of the programming cycle. 6.5.2 NVMADR REGISTER The NVMADR register is used to hold the lower two bytes of the Effective Address. The NVMADR register captures the EA<15:0> of the last table instruction that has been executed and selects the row to write. 6.5.3 NVMADRU REGISTER The NVMADRU register is used to hold the upper byte of the Effective Address. The NVMADRU register cap- tures the EA<23:16> of the last table instruction that has been executed. 6.5.4 NVMKEY REGISTER NVMKEY is a write-only register that is used for write protection. To start a programming or an erase sequence, the user must consecutively write 0x55 and 0xAA to the NVMKEY register. Refer to Section 6.6 “Programming Operations” for further details. Note: The user can also directly write to the NVMADR and NVMADRU registers to specify a program memory address for erasing or programming. |
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