REV. 0

AD7738

–21–

Single Conversion and Reading Data

When the Mode register is being written, the ADC Status Byte

is cleared and the

RDY pin goes high regardless of its previous

state. When the single conversion command is written to the

Mode register, the ADC starts the conversion on the channel

selected by the address of the Mode register. After the conversion

is completed, the Data register is updated, the Mode register is

changed to Idle mode, the relevant RDY bit is set, and the

RDY

pin goes low. The RDY bit is reset and the

RDY pin returns

high when the relevant Channel Data register is being read.

Figure 7 shows the digital interface signals executing a single

conversion on Channel 0, waiting for the

RDY pin low, and

reading the Channel 0 Data register.

Dump Mode

When the DUMP bit in the Mode register is set to 1, the Chan-

nel Status register will be read immediately by a read of the

Channel Data register regardless of whether the Status or the

Data register has been addressed through the Communication

register. The DIN pin should not be high while reading 24-bit

data in Dump mode. Otherwise the AD7738 will be reset.

Figure 8 shows the digital interface signals executing a single

conversion on Channel 0, waiting for for the

RDY pin low, and

reading the Channel 0 Status register and Data register in the

Dump mode.

DIN

SCLK

CS

DOUT

WRITE

COMMUNICATIONS

REGISTER

WRITE

MODE

REGISTER

RDY

CONVERSION

TIME

READ DATA

REGISTER

38h

40h

48h

(00h)

(00h)

DATA

DATA

WRITE

COMMUNICATIONS

REGISTER

Figure 7. Serial Interface Signals—Single Conversion Command and 16-Bit Data Reading

DIN

SCLK

CS

DOUT

WRITE

COMMUNICATIONS

REGISTER

WRITE

MODE

REGISTER

RDY

CONVERSION

TIME

READ DATA

REGISTER

38h

48h

48h

(00h)

(00h)

CH. STAT

DATA

WRITE

COMMUNICATIONS

REGISTER

READ

CHANNEL

STATUS

DATA

(00h)

Figure 8. Serial Interface Signals—Single Conversion Command, 16-Bit Data Reading, Dump Mode