07XSC200 datasheet(12/51 Pages) FREESCALE

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Analog Integrated Circuit Device Data



Freescale Semiconductor

07XSC200

3.3

Dynamic Electrical Characteristics

Table 4. Dynamic Electrical Characteristics

Characteristics noted under conditions 6.0 V

VPWR  20 V, 3.0 V  VDD  5.5 V, -40 C  TA  125 C, GND = 0 V unless

otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25 °C under nominal conditions unless

otherwise noted.

Characteristic

Symbol

Min

Typ

Max

Unit

POWER OUTPUT TIMING HS0 TO HS1

Output Rising Medium Slew Rate (medium speed slew rate / SR[1:0] = 00)(25)

•VPWR = 14 V

SRR_00

0.15

0.3

0.6

s

Output Rising Slow Slew Rate (low speed slew rate / SR[1:0] = 01)(25)

•VPWR = 14 V

SRR_01

0.07

0.15

0.3

s

Output Falling Fast Slew Rate (high speed slew rate / SR[1:0] = 10)(25)

•VPWR = 14 V

SRR_10

0.3

0.6

1.2

s

Output Falling Medium Slew Rate (medium speed slew rate / SR[1:0] = 00)(25)

•VPWR = 14 V

SRF_00

0.15

0.3

0.6

s

Output Falling Slow Slew Rate (low speed slew rate / SR[1:0] = 01)(25)

•VPWR = 14 V

SRF_01

0.07

0.15

0.3

s

Output Rising Fast Slew Rate (high speed slew rate / SR[1:0] = 10)(25)

•VPWR = 14 V

SRF_10

0.3

0.6

1.2

s

HS[0:1] Outputs Turn-ON and OFF Delay Times(26)(27)

VPWR = 14 V for medium speed slew rate (SR[1:0] = 00)

•tDLY(ON)

•tDLY(OFF)

tDLY_12

130

180

140

s

Driver Output Matching Slew Rate (SRR /SRF)

• VPWR = 14 V @ 25 °C and for medium speed slew rate (SR[1:0] = 00)

SR

0.8

1.0

1.2

HS[0:1] Driver Output Matching Time (tDLY(ON) - tDLY(OFF))

•VPWR = 14 V, fPWM = 240 Hz, PWM duty cycle = 50%, @ 25 °C for

medium speed slew rate (SR[1:0] = 00)

tRF_01

100

s

Notes

25.

Rise and Fall Slew Rates measured across a 5.0

resistive load at high side output = 30% to 70% (see Figure 4, page 19).

26.

Turn-ON delay time measured from rising edge of any signal (IN[0:1] and CSB) that would turn the output ON to VHS[0:1] = VPWR / 2

with RL = 5.0  resistive load.

27.

Turn-OFF delay time measured from falling edge of any signal (IN[0:1] and CSB) that would turn the output OFF to VHS[0:1] = VPWR / 2

with RL = 5.0  resistive load.

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