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DSPIC33FJ06GS101TE/ML датащи(PDF) 137 Page - Microchip Technology

номер детали DSPIC33FJ06GS101TE/ML
подробное описание детали  High-Performance, 16-bit Digital Signal Controllers
PDF  346 Pages
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производитель  MICROCHIP [Microchip Technology]
домашняя страница  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

DSPIC33FJ06GS101TE/ML датащи(HTML) 137 Page - Microchip Technology

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© 2009 Microchip Technology Inc.
Preliminary
DS70318D-page 135
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
8.0
OSCILLATOR
CONFIGURATION
The dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/
X04 oscillator system provides:
• External and internal oscillator options as clock
sources
• An on-chip Phase-Locked Loop (PLL) to scale the
internal operating frequency to the required
system clock frequency
• An internal FRC oscillator that can also be used
with the PLL, thereby allowing full-speed operation
without any external clock generation hardware
• Clock switching between various clock sources
• Programmable clock postscaler for system power
savings
• A Fail-Safe Clock Monitor (FSCM) that detects
clock failure and takes fail-safe measures
• A Clock Control register (OSCCON)
• Nonvolatile Configuration bits for main oscillator
selection.
• Auxiliary PLL for ADC and PWM
A simplified diagram of the oscillator system is shown
in Figure 8-1.
FIGURE 8-1:
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 OSCILLATOR SYSTEM
DIAGRAM
Note:
This data sheet summarizes the features
of
the
dsPIC33FJ06GS101/X02
and
dsPIC33FJ16GSX02/X04
families
of
devices. It is not intended to be a compre-
hensive reference source. To complement
the information in this data sheet, refer to
the “dsPIC33F Family Reference Manual”,
Section
42.
“Oscillator
(Part
IV)”
(DS70307), which is available from the
Microchip web site (www.microchip.com).
XTPLL, HSPLL,
XT, HS, EC
FRCDIV<2:0>
WDT, PWRT,
FSCM
FRCDIVN
FRCDIV16
ECPLL, FRCPLL
NOSC<2:0> FNOSC<2:0>
Reset
FRC
Oscillator
LPRC
Oscillator
DOZE<2:0>
S3
S1
S2
S1/S3
S7
S6
FRC
LPRC
S0
S5
÷16
Clock Switch
S7
Clock Fail
÷ 2
TUN<5:0>
PLL(1)
FCY
FOSC
÷N
ACLK
SELACLK
APSTSCLR<2:0>
To PWM/ADC
ENAPLL
POSCMD<1:0>
FVCO(1)
APLL
x16
ASRCSEL
FRCSEL
POSCCLK
FRCCLK
FRCCLK
POSCCLK
÷N
ROSEL
RODIV<3:0>
REFCLKO
POSCCLK
Reference Clock Generation
Auxiliary Clock Generation
RPx
Note
1:
See Section 8.1.3 “PLL Configuration” and Section 8.2 “Auxiliary Clock Generation” for FVCO values.
2:
If the Oscillator is used with XT or HS modes, an external parallel resistor with the value of 1 M
Ω must be connected.
FVCO(1)
FOSC
FP
OSC2
OSC1
Primary Oscillator
R(2)



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