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DSPIC33FJ06GS101TE/ML датащи(PDF) 79 Page - Microchip Technology |
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DSPIC33FJ06GS101TE/ML датащи(HTML) 79 Page - Microchip Technology |
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79 / 346 page ![]() © 2009 Microchip Technology Inc. Preliminary DS70318D-page 77 dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04 FIGURE 4-9: DATA ACCESS FROM PROGRAM SPACE ADDRESS GENERATION 0 Program Counter 23 bits 1 PSVPAG 8 bits EA 15 bits Program Counter(1) Select TBLPAG 8 bits EA 16 bits Byte Select 0 0 1/0 User/Configuration Table Operations(2) Program Space Visibility(1) Space Select 24 bits 23 bits (Remapping) 1/0 0 Note 1: The Least Significant bit (LSb) of program space addresses is always fixed as ‘0’ to maintain word alignment of data in the program and data spaces. 2: Table operations are not required to be word-aligned. Table read operations are permitted in the configuration memory space. |
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