DSPIC30F5015 datasheet(81/234 Pages) MICROCHIP

81 / 234 page

DS70149E-page 81

dsPIC30F5015/5016

12.0

INPUT CAPTURE MODULE

This section describes the input capture module and

associated operational modes. The features provided by

this module are useful in applications requiring

frequency (period) and pulse measurement. Figure 12-1

depicts a block diagram of the input capture module.

Input capture is useful for such modes as:

• Frequency/Period/Pulse Measurements

• Additional sources of External Interrupts

The key operational features of the input capture

module are:

• Simple Capture Event mode

• Timer2 and Timer3 mode selection

• Interrupt on input capture event

These operating modes are determined by setting the

appropriate bits in the ICxCON register (where

x = 1,2,...,N). The dsPIC30F5015/5016 device has

eight capture channels.

12.1

Simple Capture Event Mode

The simple capture events in the dsPIC30F product

family are:

• Capture every falling edge

• Capture every rising edge

• Capture every 4th rising edge

• Capture every 16th rising edge

• Capture every rising and falling edge

These simple Input Capture modes are configured by

setting the appropriate bits ICM<2:0> (ICxCON<2:0>).

12.1.1

CAPTURE PRESCALER

There are four input capture prescaler settings, speci-

fied by bits ICM<2:0> (ICxCON<2:0>). Whenever the

capture channel is turned off, the prescaler counter will

be cleared. In addition, any Reset will clear the

prescaler counter.

FIGURE 12-1:

INPUT CAPTURE MODE BLOCK DIAGRAM

Note:

This data sheet summarizes features of

this group of dsPIC30F devices and is not

intended to be a complete reference

source. For more information on the CPU,

peripherals,

descriptions

and

general device functionality, refer to the

“dsPIC30F Family Reference Manual”

(DS70046). For more information on the

device instruction set and programming,

refer to the “16-bit MCU and DSC

Programmer’s

Reference

Manual”

(DS70157).

ICxBUF

Prescaler

ICx

ICM<2:0>

Mode Select

Note:

Where ‘x’ is shown, reference is made to the registers or bits associated to the respective input

capture channels 1 through N.

Set Flag

ICxIF

ICTMR

T2_CNT

T3_CNT

Edge

Detection

Logic

Clock

Synchronizer

1, 4, 16

From General Purpose Timer Module

FIFO

R/W

Logic

ICI<1:0>

ICBNE, ICOV

ICxCON

Interrupt

Logic

Set Flag

ICxIF

Data Bus

DSPIC30F5015 датащи(PDF) 81 Page - Microchip Technology

DSPIC30F5015 датащи(HTML) 81 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

датащи скачать

ссылки URL