48GA004 datasheet(136/268 Pages) MICROCHIP

136 / 268 page

PIC24FJ64GA004 FAMILY

DS39881D-page 136

 2010 Microchip Technology Inc.

14.3

Pulse-Width Modulation Mode

The following steps should be taken when configuring

the output compare module for PWM operation:

Set the PWM period by writing to the selected

Timer Period register (PRy).

Set the PWM duty cycle by writing to the OCxRS

Write the OCxR register with the initial duty cycle.

Enable interrupts, if required, for the timer and

output compare modules. The output compare

interrupt is required for PWM Fault pin utilization.

Configure the output compare module for one of

two PWM Operation modes by writing to the

Output

Compare

Mode

bits,

OCM<2:0>

(OCxCON<2:0>).

Set the TMRy prescale value and enable the time

base by setting TON (TxCON<15>) = 1.

14.3.1

PWM PERIOD

The PWM period is specified by writing to PRy, the

Timer Period register. The PWM period can be

calculated using Equation 14-1.

EQUATION 14-1:

CALCULATING THE PWM

PERIOD(1)

14.3.2

PWM DUTY CYCLE

The PWM duty cycle is specified by writing to the

OCxRS register. The OCxRS register can be written to

at any time, but the duty cycle value is not latched into

OCxR until a match between PRy and TMRy occurs

(i.e., the period is complete). This provides a double

buffer for the PWM duty cycle and is essential for glitch-

less PWM operation. In the PWM mode, OCxR is a

read-only register.

Some important boundary parameters of the PWM duty

cycle include:

• If the Output Compare x register, OCxR, is loaded

with 0000h, the OCx pin will remain low (0% duty

cycle).

• If OCxR is greater than PRy (Timer Period

cycle).

• If OCxR is equal to PRy, the OCx pin will be low

for one time base count value and high for all

other count values.

See Example 14-1 for PWM mode timing details.

Table 14-1 shows example PWM frequencies and

resolutions for a device operating at 10 MIPS.

EQUATION 14-2:

CALCULATION FOR MAXIMUM PWM RESOLUTION(1)

Note:

This peripheral contains input and output

functions that may need to be configured

the

peripheral

pin select.

See

Section 10.4 “Peripheral Pin Select”

for

more information.

Note:

The OCxR register should be initialized

before the output compare module is first

enabled. The OCxR register becomes a

Read-Only Duty Cycle register when the

module is operated in the PWM modes.

The value held in OCxR will become the

PWM duty cycle for the first PWM period.

The contents of the Output Compare x

Secondary register, OCxRS, will not be

transferred into OCxR until a time base

period match occurs.

Note:

A PRy value of N will produce a PWM

period of N + 1 time base count cycles. For

example, a value of 7 written into the PRy

8 time base cycles.

PWM Period = [(PRy) + 1] • TCY • (Timer Prescale Value)

PWM Frequency = 1/[PWM Period]

where:

Note 1:

Based on TCY = 2 * TOSC, Doze mode

and PLL are disabled.

(

)

Maximum PWM Resolution (bits) =

FCY

FPWM • (Timer Prescale Value)

log10

log10(2)

bits

Note 1:

Based on FCY = FOSC/2, Doze mode and PLL are disabled.

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