LP2998MA datasheet(15/26 Pages) TI

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VTT

LP2998

PVIN

VDDQ

VREF

AVIN

VREF = 0.75V

VSENSE

GND

VDDQ = 1.5V

VDD = 2.5V

VTT = 0.75V

CIN

COUT

CREF

LP2998

VDDQ

VDD

VTT

PVIN

VDDQ

GND

AVIN

VSENSE

COUT

CIN

LP2998

VDDQ

VDD

VTT

PVIN

VDDQ

GND

AVIN

VSENSE

COUT

CIN

LP2998

www.ti.com

SNVS521I – DECEMBER 2007 – REVISED APRIL 2013

Figure 24. Increasing VTT by Level Shifting

Conversely, the R2 resistor can be placed between VSENSE and VDDQ to shift the VTT output lower than the

internal reference voltage of VDDQ/2. The equation relating to VTT and the resistors can be used as shown:

VTT = VDDQ/2 (1 - R1/R2)

(12)

Figure 25. Decreasing VTT by Level Shifting

HSTL APPLICATIONS

The LP2998 can be easily adapted for HSTL applications by connecting VDDQ to the 1.5V rail. This will produce a

VTT and VREF voltage of approximately 0.75V for the termination resistors. AVIN and PVIN should be connected

to a 2.5V rail for optimal performance.

Figure 26. HSTL Application

QDR APPLICATIONS

Quad data rate (QDR) applications utilize multiple channels for improved memory performance. However, this

increase in bus lines increases the current levels required for termination. The recommended approach in

terminating multiple channels is to use a dedicated LP2998 for each channel. This simplifies layout and reduces

the internal power dissipation for each regulator. Separate VREF signals can be used for each DIMM bank from

the corresponding regulator with the chipset reference provided by a local resistor divider or one of the LP2998

signals. Because VREF and VTT are expected to track and the part to part variations are minor, there should be

little difference between the reference signals of each LP2998.

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