LP2998

VREF

GND

+

+

+

SD

SD

LP2998

GND

+

+

+

SD

SD

0.01 PF

220 PF

47 PF

LP2998

SNVS521I – DECEMBER 2007 – REVISED APRIL 2013

www.ti.com

DDR-II APPLICATIONS

With the separate VDDQ pin and an internal resistor divider it is possible to use the LP2998 in applications

utilizing DDR-II memory. Figure 22 and Figure 23 show several implementations of recommended circuits with

output curves displayed in the Typical Performance Characteristics. Figure 22 shows the recommended circuit

configuration for DDR-II applications. The output stage is connected to the 1.8V rail and the AVIN pin can be

connected to either a 2.5, 3.3V or 5.5V rail.

Figure 22. Recommended DDR-II Termination

If it is not desirable to use the 1.8V rail it is possible to connect the output stage to a 3.3V rail. Care should be

taken to not exceed the maximum operating junction temperature as the thermal dissipation increases with lower

3.3V. The advantage of this configuration is that it has the ability to source and sink a higher maximum

continuous current.

Figure 23. DDR-II Termination With Higher Voltage Rails

LEVEL SHIFTING

If standards other than SSTL-2 are required, such as SSTL-3, it may be necessary to use a different scaling

pin. This has been illustrated in Figure 24 and Figure 25. Figure 24 shows how to use two resistors to level shift

can be used.

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