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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AM3703CUS датащи(PDF) 185 Page - Texas Instruments |
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AM3703CUS датащи(HTML) 185 Page - Texas Instruments |
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185 / 280 page  AM3715, AM3703 www.ti.com SPRS616F – JUNE 2010 – REVISED AUGUST 2011 (1) Higher LPDDR speed grades are supported due to inherent JEDEC LPDDR backwards compatibility. (2) 1 x16 LPDDR device is used for 16 bit LPDDR memory system. 1x32 or 2x16 LPDDR devices are used for a 32-bit LPDDR memory system. 6.4.2.1.3 PCB Stackup The minimum stackup required for routing the AM37x is a six layer stack as shown in Table 6-14. Additional layers may be added to the PCB stack up to accommodate other circuitry or to reduce the size of the PCB footprint. Table 6-14. AM37x Minimum PCB Stack Up LAYER TYPE DESCRIPTION 1 Signal Top Routing Mostly Horizontal 2 Plane Ground 3 Plane Power 4 Signal Internal Routing 5 Plane Ground 6 Signal Bottom Routing Mostly Vertical Table 6-15. PCB Stack Up Specifications (4) NO. PARAMETER MIN TYP MAX UNIT NOTES 1 PCB Routing/Plane Layers 6 2 Signal Routing Layers 3 3 Full ground layers under LPDDR routing region 2 4 Number of ground plane cuts allowed within LPDDR routing region 0 Number of ground reference planes required for each LPDDR routing 1 5 1 layer Number of layers between LPDDR routing layer and reference ground 0 6 0 plane 7 PCB Routing Feature Size 4 Mils 8 PCB Trace Width w 4 Mils 9 PCB BGA escape via pad size 18 Mils 10 PCB BGA escape via hole size 8 Mils 11 Device BGA Pad Size See Note(1) 12 LPDDR Device BGA Pad Size See Note(2) 13 Single Ended Impedance, ZO 50 75 Ω 14 Impedance Control Z-5 Z Z + 5 Ω See Note(3) (1) See the Flip Chip Ball Grid Array Package (SPRU811) reference guide for device BGA pad size. (2) See the LPDDR device manufacturer documentation for the LPDDR device BGA pad size. (3) Z is the nominal singled ended impedance selected for the PCB specified by item 12. (4) Specific routing guidelines for the CUS package can be found in the AM37x CUS Routing Guidelines (SPRABD4) application note. 6.4.2.2 Placement Figure 6-19 shows the required placement for the AM37x device as well as the LPDDR devices. The dimensions for Figure 6-19 are defined in Table 6-16. The placement does not restrict the side of the PCB that the devices are mounted on. The ultimate purpose of the placement is to limit the maximum trace lengths and allow for proper routing space. For 1x16 and 1x32 LPDDR memory systems, the second LPDDR device is omitted from the placement. Copyright © 2010–2011, Texas Instruments Incorporated Timing Requirements and Switching Characteristics 185 Submit Documentation Feedback Product Folder Link(s): AM3715 AM3703 |
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