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MPC8306S датащи(PDF) 32 Page - Freescale Semiconductor, Inc |
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MPC8306S датащи(HTML) 32 Page - Freescale Semiconductor, Inc |
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32 / 70 page ![]() MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1 32 Freescale Semiconductor USB The following figures provide the AC test load and signals for the USB, respectively. Figure 23. USB AC Test Load Figure 24. USB Signals USB clock to output valid—USBDR_STP tUSKHOV —7.5 ns — Output hold from USB clock—all outputs tUSKHOX 2— ns — Note : 1. The symbols used for timing specifications follow the pattern of t(first two letters of functional block)(signal)(state)(reference)(state) for inputs and t(first two letters of functional block)(reference)(state)(signal)(state) for outputs. For example, tUSIXKH symbolizes USB timing (USB) for the input (I) to go invalid (X) with respect to the time the USB clock reference (K) goes high (H). Also, tUSKHOX symbolizes us timing (USB) for the USB clock reference (K) to go high (H), with respect to the output (O) going invalid (X) or output hold time. Table 31. USB General Timing Parameters (continued) Parameter Symbol1 Min Max Unit Note Output Z0 = 50 OVDD/2 RL = 50 Output Signals tUSKHOV USBDR_CLK Input Signals tUSIXKH tUSIVKH tUSKHOX |
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