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MPC8306SEC датащи(PDF) 40 Page - Freescale Semiconductor, Inc

номер детали MPC8306SEC
подробное описание детали  PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications
PDF  70 Pages
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производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
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MPC8306SEC датащи(HTML) 40 Page - Freescale Semiconductor, Inc

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MPC8306S PowerQUICC II Pro Integrated Communications Processor Family Hardware Specifications, Rev. 1
40
Freescale Semiconductor
JTAG
The following figure shows the SPI timing in slave mode (external clock).
Figure 30. SPI AC Timing in Slave Mode (External Clock) Diagram
The following figure shows the SPI timing in master mode (internal clock).
Figure 31. SPI AC Timing in Master Mode (Internal Clock) Diagram
18 JTAG
This section describes the DC and AC electrical specifications for the IEEE Std. 1149.1™ (JTAG)
interface of the MPC8306S.
18.1
JTAG DC Electrical Characteristics
The following table provides the DC electrical characteristics for the IEEE Std. 1149.1 (JTAG) interface
of the MPC8306S.
Table 44. JTAG Interface DC Electrical Characteristics
Characteristic
Symbol
Condition
Min
Max
Unit
Output high voltage
VOH
IOH =–6.0mA
2.4
—
V
Output low voltage
VOL
IOL =6.0 mA
—
0.5
V
Output low voltage
VOL
IOL =3.2 mA
—
0.4
V
SPICLK (Input)
tNEIXKH
tNEIVKH
tNEKHOV
Input Signals:
SPIMOSI
(See Note)
Output Signals:
SPIMISO
(See Note)
Note:
The clock edge is selectable on SPI.
SPICLK (Output)
tNIIXKH
tNIKHOV
Input Signals:
SPIMISO
(See Note)
Output Signals:
SPIMOSI
(See Note)
Note:
The clock edge is selectable on SPI.
tNIIVKH



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