CPM2C-S1❑0C

CPM2C-S1❑0C

2

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For a complete system see System Configuration on last page.

s

CPU Units

Unit

Inputs

Outputs

Clock

Part Number

10-point input type

Connector type

24 VDC

Transistor

❍

CPM2C-S100C

6 inputs

6 points

(sinking)

4 outputs

4 points

10-point input type

Connector type

24 VDC

Transistor

❍

CPM2C-S110C

6 inputs

6 points

(sourcing)

4 outputs

4 points

Ordering Information

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General and Performance Specifications

Item

Specifications

Control method

Stored program control

I/O control method

Cyclic scan with direct output – Immediate refreshing can be performed with IORF (97)

Programming language

Ladder diagram

Instruction length

1 step per instruction, 1 to 5 words per instruction

Instructions

Basic

14

instructions

Special

105 instructions, 185 variations

instructions

Execution time

Basic

0.64

µs (LD instruction)

instructions

Special

7.8

µs (MOV instruction)

instructions

Program capacity

4,096 words

Maximum I/O capacity

CPU Unit only: 10 points

Expanded system: 72 points (24-point Unit X 3)

(Up to 3 Expansion I/O Units can be connected)

CompoBus/S: 256 points (total 338)

Input bits

IR 00000 to 00915

(Bits not used for input bits can be used for work bits)

Output bits

IR 01000 to IR 01915

(Bits not used for output bits can be used for work bits)

CompoBus/S input bits

128 bits: IR 02000 to IR 02715 (words IR 020 to IR 027)

CompoBus/S output bits

128 bits: IR 03000 to IR 03715 (words IR 030 to IR 037)

Work bits

672 bits: IR 02800 to IR 02915 (words IR 028 to IR 029)

IR 03800 to IR 03915 (words IR 038 to IR 039)

IR 04000 to IR 04915 (words IR 040 to IR 049)

IR 20000 to IR 22715 (words IR 200 to IR 227)

Dedicated bits (SR area)

440 bits: SR 22800 to SR 25507 (words SR 228 to SR 255)

Temporary bits (TR area)

8 bits (TR0 to TR7)

Holding bits (HR area)

320 bits: HR 0000 to HR 1915 (words HR 00 to HR 19)

Auxiliary bits (AR area)

384 bits: AR 0000 to AR 2315 (words AR 00 to AR 23)

Including CompoBus/S Slave Status Area (AR 04 to AR 07)

Link bits (LR area)

256 bits: LR 0000 to LR 1515 (words LR 00 to LR 15)

Timers/Counters

256 timers/counters (TIM/CNT 000 to TIM/CNT 255)

1-ms timer: TMHH(--)

10-ms timer: TIMH(15)

100-ms timer: TIM

1-s/10-s timer: TIM(--)

Decrementing counter: CNT

Reversible counter: CNTR(12)

Specifications