ADIS16448SLASHPCBZ datasheet(15/24 Pages) AD

15 / 24 page

Data Sheet

ADIS16448

Rev. B | Page 15 of 24

STATUS/ERROR FLAGS

The DIAG_STAT register in Table 31 provides error flags for

a number of functions. Each flag uses 1 to indicate an error con-

dition and 0 to indicate a normal condition. Reading this register

provides access to the status of each flag and resets all of the bits

to 0 for monitoring future operation. If the error condition remains,

the error flag returns to 1 at the conclusion of the next sample

cycle. DIAG_STAT[0] does not require a read of this register

to return to 0. If the power supply voltage goes back into range,

this flag clears automatically. The SPI communication error flag

in DIAG_STAT[3] indicates that the number of SCLKs in a SPI

sequence did not equal a multiple of 16 SCLKs.

Table 31. DIAG_STAT (Base Address = 0x3C), Read Only

Bits

Description (Default = 0x0000)

Z-axis accelerometer self-test failure

1 = fail, 0 = pass

Y-axis accelerometer self-test failure

1 = fail, 0 = pass

X-axis accelerometer self-test failure

1 = fail, 0 = pass

Z-axis gyroscope self-test failure

0 = pass

Y-axis gyroscope self-test failure

1 = fail, 0 = pass

X-axis gyroscope self-test failure

1 = fail, 0 = pass

Alarm 2 status

1 = active, 0 = inactive

Alarm 1 status

1 = active, 0 = inactive

New data, xMAGN_OUT/BARO_OUT

Flash test, checksum flag

1 = fail, 0 = pass

Self-test diagnostic error flag

1 = fail, 0 = pass

Sensor overrange

1 = overrange, 0 = normal

SPI communication failure

1 = fail, 0 = pass

Flash update failure

1 = fail, 0 = pass

Barometer functional test

1 = fail, 0 = pass

Magnetometer functional test

1 = fail, 0 = pass

Magnetometer/Barometer New Data Indicator

DIAG_STAT[7] indicates that all four registers have new,

unread data in them. This bit rises to 1 after the xMAGN_OUT

and BARO_OUT registers have new data updates. It lowers to

zero after one of the registers are accessed using a SPI-driven

read command. This bit does not return to zero after reading

DIAG_STAT.

MEMORY MANAGEMENT

The FLASH_CNT register in Table 32 provides a 16-bit counter

that helps track the number of write cycles to the nonvolatile flash

memory. The flash updates every time a manual flash update

occurs. A manual flash update is initiated by the GLOB_CMD[3]

bit and is performed at the completion of the GLOB_CMD[1:0]

functions (see Table 25).

Table 32. FLASH_CNT (Base Address = 0x00), Read Only

Bits

Description

[15:0]

Binary counter

Checksum Test

Set MSC_CTRL[11] = 1 (DIN = 0xB508) to perform a check-

sum test of the internal program memory. This function takes

a summation of the internal program memory and compares it

with the original summation value for the same locations (from

factory configuration). If the sum matches the correct value,

DIAG_STAT[6] is equal to 0. If it does not match,

DIAG_STAT[6] is equal to 1. Make sure that the power supply

is within specification for the entire 20 ms that this function

takes to complete.

ADIS16448/PCBZ датащи(PDF) 15 Page - Analog Devices

ADIS16448/PCBZ датащи(HTML) 15 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24

датащи скачать

ссылки URL