AD9874ABST datasheet(14/40 Pages) AD

14 / 40 page

REV. A

AD9874

–14–

Address

Bit

(Hex)

Breakdown

Width

Default Value

Name

Description

CLOCK SYNTHESIZER

0x10

(5:0)

CKR(13:8) Reference Frequency Divisor (6 MSB of a 14-Bit Word).

0x11

(7:0)

0x38

CKR(7:0)

Reference Frequency Divisor (8 LSB of a 14-Bit Word).

Default yields 300 kHz from fREF =16.8 MHz; Min = 3, Max = 16383.

0x12

(4:0)

0x00

CKN(12:8) Synthesized Frequency Divisor (5 MSB of a 13-Bit Word).

0x13

(7:0)

0x3C

CKN(7:0)

Synthesized Frequency Divisor (8 LSB of a 13-Bit Word).

Default yields 300 kHz from fCLK = 18 MHz; Min = 3, Max = 8191.

0x14

(6)

CKF

Enable fast acquire.

(5)

CKINV

Invert charge pump (0 = source current to increase VCO frequency).

(4:2)

CKI

Charge Pump Current in Normal Operation. IPUMP = (CKI + 1)

0.625 mA.

(1:0)

CKTM

Manual Control of CLK Charge Pump (0 = Off, 1 = Up, 2 = Down,

3 = Normal).

0x15

(5:0)

0x0

CKFA(13:8)

CK Fast Acquire Time Unit (6 MSB of a 14-Bit Word).

0x16

(7:0)

0x04

CKFA(7:0)

CK Fast Acquire Time Unit (8 LSB of a 14-Bit Word).

SSI CONTROL

0x18

(7:0)

0x12

SSICRA

SSI Control Register A. See Table III. (Default is FS and CLKOUT

three-stated.)

0x19

(7:0)

0x07

SSICRB

SSI Control Register B. See Table III. (16-bit data, maximum drive strength.)

0x1A

(3:0)

SSIORD

Output Rate Divisor. fCLKOUT = fCLK/SSIORD.

ADC TUNING

0x1C

(1)

TUNE_LC

Perform tuning on the LC portion of the ADC (cleared when done).

(0)

TUNE_RC

Perform tuning on the RC portion of the ADC (cleared when done).

0x1D

(2:0)

CAPL1(2:0)

Coarse Capacitance Setting for LC Tank (LSB is 25 pF, Differential).

0x1E

(5:0)

0x00

CAPL0(5:0)

Fine Capacitance Setting for LC Tank (LSB is 0.4 pF, Differential).

0x1F

(7:0)

0x00

CAPR

Capacitance Setting for RC Resonator (64 LSB of Fixed Capacitance).

TEST REGISTERS AND SPI PORT READ ENABLE

0x37–

(7:0)

0x00

TEST

Factory Test Mode. Do not use.

0x39

0x3A

(7:4, 2:0)

0x0

TEST

Factory Test Mode. Do not use.

(3)

SPIREN

Enable read from SPI port.

0x3B

(7:4, 2:0)

0x0

TEST

Factory Test Mode. Do not use.

(3)

TRI

Three-state DOUTB.

0x3C–

(7:0)

0x00

TEST

Factory Test Mode. Do not use.

0x3E

0x3F

(7:0)

Subject to

Revision ID (Read-Only); A write of 0x99 to this register is equivalent to

Change

a power-on reset.

Table I. SPI Address Map (continued)

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