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STM32F101RBH6 датащи(PDF) 34 Page - STMicroelectronics |
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STM32F101RBH6 датащи(HTML) 34 Page - STMicroelectronics |
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34 / 90 page ![]() Electrical characteristics STM32F101x8, STM32F101xB 34/90 DocID13586 Rev 16 5.3.2 Operating conditions at power-up / power-down Subject to general operating conditions for TA. Table 9. Operating conditions at power-up / power-down 5.3.3 Embedded reset and power control block characteristics The parameters given in Table 10 are derived from tests performed under the ambient temperature and VDD supply voltage conditions summarized in Table 8. VIN I/O input voltage Standard IO –0.3 VDD + 0.3 V FT IO(3) 2 V < VDD 3.6 V –0.3 5.5 VDD = 2 V –0.3 5.2 BOOT0 0 5.5 PD Power dissipation at TA = 85 °C (4) LQFP100 434 mW LQFP64 444 LQFP48 363 UFQFPN48 624 VFQFPN36 1000 TA Ambient temperature Maximum power dissipation –40 85 °C Low power dissipation(5) –40 105 TJ Junction temperature range –40 105 1. When the ADC is used, refer to Table 42: ADC characteristics. 2. It is recommended to power VDD and VDDA from the same source. A maximum difference of 300 mV between VDD and VDDA can be tolerated during power-up and operation. 3. To sustain a voltage higher than VDD+0.3 V, the internal pull-up/pull-down resistors must be disabled. 4. If TA is lower, higher PD values are allowed as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 80). 5. In low power dissipation state, TA can be extended to this range as long as TJ does not exceed TJmax (see Table 6.2: Thermal characteristics on page 80). Table 8. General operating conditions (continued) Symbol Parameter Conditions Min Max Unit Symbol Parameter Conditions Min Max Unit tVDD VDD rise time rate 0 µs/V VDD fall time rate 20 |
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