SO16N datasheet(18/51 Pages) STMICROELECTRONICS

18 / 51 page

Application information

L6566BH

18/51

Doc ID 16610 Rev 2

Figure 6.

Timing diagram: normal power-up and power-down sequences

As the Vcc voltage reaches the turn-on threshold (14 V typ.) the device starts operating and

the HV generator is cut off by the Vcc_OK signal asserted high. The device is powered by

the energy stored in the Vcc capacitor until the self-supply circuit (typically an auxiliary

winding of the transformer and a steering diode) develops a voltage high enough to sustain

the operation. The residual consumption of this circuit is just the one on the 15 M

Ω resistor

(

≈ 10 mW at 400 Vdc), typically 50-70 times lower, under the same conditions, as compared

to a standard startup circuit made with external dropping resistors.

At converter power-down the system loses regulation as soon as the input voltage is so low

that either peak current or maximum duty cycle limitation is tripped. Vcc then drops and

stops IC activity as it falls below the UVLO threshold (10 V typ.). The VCC_OK signal is de-

asserted as the Vcc voltage goes below a threshold VCCrest located at about 5 V. The HV

generator can now restart. However, if Vin < Vinstart, as illustrated in Figure 6, HV_EN is de-

asserted too and the HV generator is disabled. This prevents converter restart attempts and

ensures monotonic output voltage decay at power-down in systems where brownout

protection (see the relevant section) is not used.

The low restart threshold VCCrest ensures that, during short-circuits, the restart attempts of

the device have a very low repetition rate, as shown in the timing diagram of

Figure 7, and

that the converter works safely with extremely low power throughput.

AM11482v1

Vcc

(pin 5)

(pin 4)

HV_EN

VccON

VccOFF

Vccrestart

Vin

VHVstart

Icharge

0.85 mA

cc_OK

Power-on

Power-off

Normal

operation

regulation is lost here

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