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SPEAR320-2 датащи(PDF) 35 Page - STMicroelectronics

номер детали SPEAR320-2
подробное описание детали  Embedded MPU with ARM926 core, optimized for factory automation and consumer applications
PDF  73 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

SPEAR320-2 датащи(HTML) 35 Page - STMicroelectronics

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SPEAr320
Pin description
Doc ID 16755 Rev 5
35/73
4.3.6
Multiplexing scheme
To provide the best I/O multiplexing flexibility and the higher number of GPIOs for ARM
controlled input-output function, the following hierarchical multiplexing scheme has been
implemented.
Figure 3.
Hierarchical multiplexing scheme
GPIOs
SMII automation networking
MII automation networking
Expanded automation
Printer
Programmer model control
register bits (2:0)
GPIO_Select(0 ..3) registers
PL_GPIO
RAS select register
Alternate functions
Table 11.
PL_GPIO multiplexing scheme
PL_GPIO_# /
ball
number
Configuration mode (enabled by Programmer model
control register bits (2:0))
Alternate
function
(enabled by
RAS select
register)
Function in
GPIO
alternative
mode
12
3
4
PL_GPIO_97/H16
CLD0
MII1_TXCLK
EMI_A0
0
GPIO_97
PL_GPIO_96/H15
CLD1
MII1_TXD0
EMI_A1
0
GPIO_96
PL_GPIO_95/H14
CLD2
MII1_TXD1
EMI_A2
0
GPIO_95
PL_GPIO_94/H13
CLD3
MII1_TXD2
EMI_A3
0
GPIO_94
PL_GPIO_93/G17
CLD4
MII1_TXD3
EMI_A4
0
GPIO_93
PL_GPIO_92/G16
CLD5
MII1_TXEN
EMI_A5
0
GPIO_92
PL_GPIO_91/G15
CLD6
MII1_TXER
EMI_A6
0
GPIO_91
PL_GPIO_90/G14
CLD7
MII1_RXCLK
EMI_A7
0
GPIO_90
PL_GPIO_89/F17
CLD8
MII1_RXDV
EMI_A8
0
GPIO_89
PL_GPIO_88/F16
CLD9
MII1_RXER
EMI_A9
0
GPIO_88
PL_GPIO_87/G13
CLD10
MII1_RXD0
EMI_A10
0
GPIO_87



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