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STM32F103RG датащи(PDF) 57 Page - STMicroelectronics |
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STM32F103RG датащи(HTML) 57 Page - STMicroelectronics |
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57 / 120 page ![]() STM32F103xF, STM32F103xG Electrical characteristics Doc ID 16554 Rev 3 57/120 Low-speed external clock generated from a crystal/ceramic resonator The low-speed external (LSE) clock can be supplied with a 32.768 kHz crystal/ceramic resonator oscillator. All the information given in this paragraph are based on characterization results obtained with typical external components specified in Table 24. In the application, the resonator and the load capacitors have to be placed as close as possible to the oscillator pins in order to minimize output distortion and startup stabilization time. Refer to the crystal resonator manufacturer for more details on the resonator characteristics (frequency, package, accuracy). Note: For CL1 and CL2, it is recommended to use high-quality ceramic capacitors in the 5 pF to 15 pF range selected to match the requirements of the crystal or resonator (see Figure 21). CL1 and CL2, are usually the same size. The crystal manufacturer typically specifies a load capacitance which is the series combination of CL1 and CL2. Load capacitance CL has the following formula: CL = CL1 x CL2 / (CL1 + CL2) + Cstray where Cstray is the pin capacitance and board or trace PCB-related capacitance. Typically, it is between 2 pF and 7 pF. Caution: To avoid exceeding the maximum value of CL1 and CL2 (15 pF) it is strongly recommended to use a resonator with a load capacitance CL ≤ 7 pF. Never use a resonator with a load capacitance of 12.5 pF. Example: if you choose a resonator with a load capacitance of CL = 6 pF, and Cstray = 2 pF, then CL1 = CL2 = 8 pF. Table 24. LSE oscillator characteristics (fLSE = 32.768 kHz) (1)(2) Symbol Parameter Conditions Min Typ Max Unit RF Feedback resistor - 5 - M Ω C(2) Recommended load capacitance versus equivalent serial resistance of the crystal (RS) RS = 30 kΩ - - 15 pF I2 LSE driving current VDD = 3.3 V, VIN = VSS -- 1.4 µA gm Oscillator transconductance 5 - - µA/V tSU(LSE) (3) Startup time VDD is stabilized TA = 50 °C - 1.5 - s TA = 25 °C - 2.5 - TA = 10 °C - 4 - TA = 0 °C - 6 - TA = -10 °C - 10 - TA = -20 °C - 17 - TA = -30 °C - 32 - TA = -40 °C - 60 - 1. Based on characterization, not tested in production. 2. Refer to the note and caution paragraphs below the table, and to the application note AN2867 “Oscillator design guide for ST microcontrollers”. 3. tSU(LSE) is the startup time measured from the moment it is enabled (by software) until a stabilized 32.768 kHz oscillation is reached. This value is measured for a standard crystal and it can vary significantly with the crystal manufacturer, PCB layout and humidity |
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