SN75970B

SCSI DIFFERENTIAL CONVERTER-CONTROL

SLLS323A – NOVEMBER 1999 – REVISED JANUARY 2000

12

POST OFFICE BOX 655303

PARAMETER MEASUREMENT INFORMATION

Output

1.5 V

Input

(see Note A)

B–

15 pF

(see Note B)

td3

td4

Input

Output

0 V

1.5 V

3 V

t0

t0

or

delay

delay

A–

RESET

TEST

DSENS

RSTFLTR

VOL

1.5 V

VOH

B+

A–

B–

NOTES: A. The input pulse is supplied by a generator having the following characteristics: tr ≤ 1 ns, tf ≤ 1 ns PRR ≤ 1 MHz, 45% < duty cycle

< 50%, ZO = 50 Ω.

B. Resistance values are with a tolerance of

±5%.

C. All input voltage levels are held to within 0.01 V.

Figure 4. B-Side to A-Side Propagation Delay Time Test Circuit and Timing Definitions

Table 1. Output Test Enabling (No Clock Input)

SIGNAL

BUS

CONTROL INPUT(s)

SIGNAL

INPUT(s)

OUTPUT

TEST

RSTFLTR

RESET

BBSY –

BBSY+

ABSY–

DSENS

ATN, ACK, MSG, C/D, REQ, I/O

A

B

H

H

L

ATN, ACK, MSG, C/D, REQ, I/O

B

A

H

L

L

RST

A

B

L

→ H

H

L

H

H

RST

B

A

L

→ H

H

L

H

H

SEL, BSY

B

A

L

H

L

→ H

SEL, BSY

B

H

H

L

H

TIMEOUT

N/A

H

L

L

DRVBUS†

BBSY –/ BBSY+,

BSEL–/BSEL+,

TIMEOUT

DRVBUS

H

L

L

TIMEOUT

N/A

Z

H

L

† For these conditions, DRVBUS = BSEL or BBSY and TIMEOUT together.