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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HCS473 датащи(PDF) 52 Page - Microchip Technology |
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HCS473 датащи(HTML) 52 Page - Microchip Technology |
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52 / 68 page  HCS473 DS40035D-page 52 Preliminary 2000-2013 Microchip Technology Inc. TABLE 7-3: AC CHARACTERISTICS, FOSC = 4 MHz(1) AC Characteristics FOSC = 4 MHz (1) The min and max values below are due to HCS473 algorithm tolerances, not variations due to supply voltage and temperature. Symbol Min Typ Max Description General HCS473 Timing TDB — 10 ms — Debounce Time TQUE — 2s — Que Window TPU — 10.9 ms — Power-up Delay Time (includes button debounce) TPLL — 19 ms — Encoder Mode PLL activation to first code word TLEDON — 100 ms — LED ON Time TLEDOFF — 500 ms — LED OFF Time Communication from Transponder Reader to HCS473 TCMD 1LFTE+100 s — 10.2 ms TTSCMD 1LFTE+100 s — 10.2 ms Delay from Transponder Select ACK to next command TFINH 100 s 1LFTE — Time to leave LF on after last data bit’s rising edge Response from HCS473 to Transponder Reader TSF 1ms+1LFTE 3.5ms+1LFTE 10ms+1LFTE Delay to wake-up Acknowledge sequence TTSACK 1LFTE+16 s 1LFTE-11 s 1LFTE+30 s 1 LFTE 1LFTE+44 s 1LFTE+11 s Delay from TID pulse rising edge to TID Acknowledge TID = 0 TID > 0 TTPACK 157 s 179 s 212 s Delay to Transport Code Acknowledge TWRT — 4 ms 10 ms Delay to Write Acknowledge TAOACK 67 s 89 s 122 s Delay to anticollision off Acknowledge TIFF — 5.64ms — Delay to IFF response - RF or LF response TREAD 205 s 227 s 260 s Delay to read response - RF or LF response THOP — 19 ms — Delay to hopping code response - RF or LF response TDAMP —1.2 LFTE — Delay from detecting LC rising edge to first damp pulse TDEMOD — 16.4 ms — Demodulator mode window looking for edge on LC pin Timing Element TE TE 90 180 360 720 100 200 400 800 110 220 440 880 RFTE or LFTE RFBSL = LFBSL = 002 RFBSL = LFBSL = 012 RFBSL = LFBSL = 102 RFBSL = LFBSL = 112 Analog delays TFILTR — 15 s — HCS473 analog LF filter charge time TFILTF — 70 s — HCS473 analog LF filter discharge time TANTR Hardware design dependent Cumulative LF antenna delay when field is turned on TANTF Hardware design dependent Cumulative LF antenna delay when field is turned off Note 1: FOSC = 4 MHz may be centered at the designer’s choice of supply voltage (VDD) and temperature. 2: LFTE is based on the HCS473’s timing, not the timing of the transponder reader. Therefore LFTE is subject to HCS473 oscillator variation. 3: Response timing accounts for TFILTR but not for TANTR or TANTF, as they are design dependent. The system designer must compensate communication accordingly for TANTR and TANTF. 4: Timing parameters are characterized but not tested. |
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