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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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64GA110 датащи(PDF) 18 Page - Microchip Technology |
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64GA110 датащи(HTML) 18 Page - Microchip Technology |
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18 / 330 page  PIC24FJ256GA110 FAMILY DS39905E-page 18 2010 Microchip Technology Inc. CTED1 28 34 42 I ANA CTMU External Edge Input 1. CTED2 27 33 41 I ANA CTMU External Edge Input 2. CTPLS 29 35 43 O — CTMU Pulse Output. CVREF 23 29 34 O — Comparator Voltage Reference Output. ENVREG 57 71 86 I ST Voltage Regulator Enable. INT0 35 45 55 I ST External Interrupt Input. MCLR 79 13 I ST Master Clear (device Reset) Input. This line is brought low to cause a Reset. OSCI 39 49 63 I ANA Main Oscillator Input Connection. OSCO 40 50 64 O ANA Main Oscillator Output Connection. PGEC1 15 19 24 I/O ST In-Circuit Debugger/Emulator/ICSP™ Programming Clock. PGED1 16 20 25 I/O ST In-Circuit Debugger/Emulator/ICSP Programming Data. PGEC2 17 21 26 I/O ST In-Circuit Debugger/Emulator/ICSP Programming Clock. PGED2 18 22 27 I/O ST In-Circuit Debugger/Emulator/ICSP Programming Data. PGEC3 11 15 20 I/O ST In-Circuit Debugger/Emulator/ICSP Programming Clock. PGED3 12 16 21 I/O ST In-Circuit Debugger/Emulator/ICSP Programming Data. PMA0 30 36 44 I/O ST Parallel Master Port Address Bit 0 Input (Buffered Slave modes) and Output (Master modes). PMA1 29 35 43 I/O ST Parallel Master Port Address Bit 1 Input (Buffered Slave modes) and Output (Master modes). PMA2 8 10 14 O — Parallel Master Port Address (Demultiplexed Master modes). PMA3 6 8 12 O — PMA4 5 7 11 O — PMA5 4 6 10 O — PMA6 16 24 29 O — PMA7 22 23 28 O — PMA8 32 40 50 O — PMA9 31 39 49 O — PMA10 28 34 42 O — PMA11 27 33 41 O — PMA12 24 30 35 O — PMA13 23 29 34 O — PMCS1 45 57 71 I/O ST/TTL Parallel Master Port Chip Select 1 Strobe/Address Bit 15. PMCS2 44 56 70 O ST Parallel Master Port Chip Select 2 Strobe/Address Bit 14. PMBE 51 63 78 O — Parallel Master Port Byte Enable Strobe. PMD0 60 76 93 I/O ST/TTL Parallel Master Port Data (Demultiplexed Master mode) or Address/Data (Multiplexed Master modes). PMD1 61 77 94 I/O ST/TTL PMD2 62 78 98 I/O ST/TTL PMD3 63 79 99 I/O ST/TTL PMD4 64 80 100 I/O ST/TTL PMD5 113 I/O ST/TTL PMD6 224 I/O ST/TTL PMD7 335 I/O ST/TTL PMRD 53 67 82 O — Parallel Master Port Read Strobe. PMWR 52 66 81 O — Parallel Master Port Write Strobe. TABLE 1-4: PIC24FJ256GA110 FAMILY PINOUT DESCRIPTIONS (CONTINUED) Function Pin Number I/O Input Buffer Description 64-Pin TQFP, QFN 80-Pin TQFP 100-Pin TQFP Legend: TTL = TTL input buffer ST = Schmitt Trigger input buffer ANA = Analog level input/output I2C™ = I2C/SMBus input buffer |
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