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WM8952ECS/RV датащи(PDF) 12 Page - Wolfson Microelectronics plc

номер детали WM8952ECS/RV
подробное описание детали  Mono ADC with Microphone Pre-amplifier
PDF  72 Pages
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производитель  WOLFSON [Wolfson Microelectronics plc]
домашняя страница  http://www.wolfsonmicro.com
Logo WOLFSON - Wolfson Microelectronics plc

WM8952ECS/RV датащи(HTML) 12 Page - Wolfson Microelectronics plc

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WM8952
Pre Production
w
PP, Rev 3.1, June 2011
12
Test Conditions
DVDD=1.8V, AVDD= 3.3V, DGND=AGND =0V, TA=+25
oC, Slave Mode, fs=48kHz, MCLK=256fs, 24-bit data, unless otherwise
stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
FRAME propagation delay from BCLK falling edge
tDL
10
ns
ADCDAT propagation delay from BCLK falling edge
tDDA
15
ns
AUDIO INTERFACE TIMING – SLAVE MODE
Figure 3 Digital Audio Data Timing – Slave Mode
Test Conditions
DVDD=1.8V, AVDD=3.3V, DGND=AGND =0V, TA=+25
oC, Slave Mode, fs=48kHz, MCLK= 256fs, 24-bit data, unless otherwise
stated.
PARAMETER
SYMBOL
MIN
TYP
MAX
UNIT
Audio Data Input Timing Information
BCLK cycle time
tBCY
81.38
ns
BCLK pulse width high
tBCH
32.55
ns
BCLK pulse width low
tBCL
32.55
ns
FRAME set-up time to BCLK rising edge
tLRSU
10
ns
FRAME hold time from BCLK rising edge
tLRH
10
ns
ADCDAT propagation delay from BCLK falling edge
tDD
15
ns
Note:
BCLK period should always be greater than or equal to MCLK period.



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