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AD9884A/PCB датащи(PDF) 22 Page - Analog Devices |
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AD9884A/PCB датащи(HTML) 22 Page - Analog Devices |
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22 / 24 page ![]() REV. B AD9884A –22– PCB LAYOUT RECOMMENDATIONS The AD9884A is a high precision, high speed analog device. As such, to get the maximum performance out of the part it is important to have a well laid-out board. Inputs Using the following layout techniques on the graphics inputs is extremely important: Minimize the trace length running into the graphics inputs. This is accomplished by placing the AD9884A as close as possible to the input connector. Long input trace lengths are undesirable because they will pick up more noise from the board and other external sources. Place the 75 Ω termination resistors as close to the AD9884A as possible. Any additional trace length between the termination resistors and the input of the AD9884A increases the magnitude of reflections, which will corrupt the graphics signal. Use 75 Ω matched impedance traces. Trace impedances other than 75 Ω will also increase the magnitude of reflections. The AD9884A has very high input bandwidth (500 MHz). While this is desirable for acquiring a high resolution PC graphics signal with fast edges, it means that it will also capture any high frequency noise present. Therefore, it is important to reduce the amount of noise that gets coupled to the inputs. Avoid running any digital traces near the analog inputs. Due to the high bandwidth of the AD9884A, sometimes low- pass filtering the analog inputs can help to reduce noise. (For many applications, filtering is unnecessary.) Our experiments have shown that placing a series ferrite bead prior to the 75 Ω termination resistor is helpful in filtering out excess noise. Spe- cifically, we used the Part #2508051217Z0 from Fair-Rite, but each application may work best with a different bead value. Power Supply Bypassing We recommend you bypass each power supply pin with a 0.1 µF capacitor. The exception is in the case where two or more sup- ply pins are adjacent. For these groupings of powers/grounds, it is only necessary to have one bypass capacitor. The fundamental idea is to have a bypass capacitor within about 0.5 cm of each power pin. Also, avoid placing the capacitor on the opposite side of the PC board from the AD9884A, as that interposes resistive vias in the path. The bypass capacitors should be connected between the power plane and the power pin. Current should flow from the power plane ¡ capacitor ¡ power pin. Do not make the power connec- tion between the capacitor and the power pin. Placing a via underneath the capacitor pads, down to the power plane, is generally the best approach. It is particularly important to maintain low noise and good stability of PVD (the clock generator supply). Abrupt changes in PVD can result in similarly abrupt changes in sampling clock phase and frequency. This can be avoided by careful attention to regulation, filtering, and bypassing. It is highly desirable to provide a separately regulated supply for the analog circuitry (VD and PVD). Some graphic controllers use substantially different levels of power when active (during active picture time) and when idle (during Horizontal and Vertical sync periods). This can result in a measurable change in the voltage supplied to the analog supply regulator, which can in turn produce changes in the regulated analog voltage. This can be mitigated by regulating the analog supply, or at least PVD, from a different, cleaner, power source (for example, from a +12 V supply). We also recommend that you use a single ground plane for the entire board. Experience has repeatedly shown that the noise performance is better, or at least the same, with a single ground plane. Using multiple ground planes can be detrimental because each separate ground plane is smaller, and long ground loops can result. P6 RGBIN P0 P1 P2 P3 P4 P5 HSYNC PXCK HS ADCCK DATACK DOUTA HSOUT DOUTB D3 D7 D1 D5 6.5 PIPE DELAY P7 Figure 26. Dual Channel Mode, Parallel Outputs, Alternate Pixel Sampling (Odd Pixels) |
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