SSL4120 datasheet(15/48 Pages) NXP

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SSL4120

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Product data sheet

Rev. 2 — 1 November 2012

15 of 48

NXP Semiconductors

SSL4120

Resonant power supply controller IC with PFC for LED lighting

7.5.5 Output undervoltage protection (SNSOUT pin)

If an error condition causes an output voltage drop when the SSL4120 is supplied from

the HBC transformer auxiliary winding, a SUPIC UVP event is automatically triggered.

If an error condition causes a decrease in the output voltage when the IC is supplied from

a separate DC source (for example, a standby supply), the IC does not automatically stop

switching. To counter this, the IC outputs are provided with undervoltage protection (UVP

output; see Section 7.9).

If VSNSOUT <Vuvp(SNSOUT) = 2.3 V, a UVP output event restarts the IC.

During start-up, the output voltage is less than Vuvp(SNSOUT) for a time. This voltage drop is

not considered as an error condition if it does not last longer than expected. The

protection timer is started when VSNSOUT <Vuvp(SNSOUT) for this reason. The Restart state

is activated if the UVP output event is still active when the protection time has expired.

7.5.6 OverTemperature Protection (OTP)

Accurate internal overtemperature protection is provided in the SSL4120. When the

junction temperature exceeds the overtemperature protection activation temperature,

Totp = 150 C), the IC enters the Thermal hold state. The SSL4120 exits the Thermal hold

state when the temperature falls again to approximately Totp  10 C.

7.6 Burst mode operation (SNSOUT pin)

The HBC and PFC controllers can be operated in burst mode. In burst mode, the

controllers are on for a period, then off for a period. Burst mode operation increases

efficiency under low-load conditions.

A low-load condition can be detected using a simple external circuit that uses the

information from the feedback loop or from the average primary current. The detection

circuit can pull down the SNSOUT pin to pause the SSL4120 operation for a burst-off

time. Only the HBC controller or both controllers can be paused during the burst-off time:

• Burst-off level for HBC, Vburst(HBC) =1 V

When VSNSOUT <Vburst(HBC), the HBC controller is suspended. Both the high-side and

the low-side power switches are off. The PFC continues to operate normally. When

VSNSOUT >Vburst(HBC) again, the HBC controller resumes normal operation, without

executing a soft-start sequence.

• Burst-off level for PFC, Vburst(PFC) =0.4 V

When VSNSOUT <Vburst(PFC), operation of the PFC controller is also suspended (the

HBC is already paused). When VSNSOUT >Vburst(PFC) again, the PFC controller

resumes normal operation using a PFC soft-start (see Section 7.7.6).

To ensure that burst mode is not activated before the output voltage becomes valid,

current from the SNSOUT pin (100

A) holds V

SNSOUT at Vpu(SNSOUT). This level is above

both burst levels. The resistance between the SNSOUT pin and ground must be > 20 k

.

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