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SSL4120 датащи(PDF) 31 Page - NXP Semiconductors |
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SSL4120 датащи(HTML) 31 Page - NXP Semiconductors |
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31 / 48 page ![]() SSL4120 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2012. All rights reserved. Product data sheet Rev. 2 — 1 November 2012 31 of 48 NXP Semiconductors SSL4120 Resonant power supply controller IC with PFC for LED lighting The protection timer is also started. The Restart state is activated when the OCR-HBC condition is still present after the protection time has elapsed. 7.8.10.3 Overcurrent protection, OCP-HBC Under normal operating conditions, OCR is able to ensure the current remains below the specified maximum values. However, in the event of certain error conditions, it is not fast enough to limit the current. OCP is implemented to protect against those error conditions. The OCP level (Vocp(HBC) = 1 V and +1 V), is higher than the OCR level Vocr(HBC). When the OCP level is reached, the frequency immediately jumps to the maximum value using the soft-start reset, then a normal sweep down. 7.8.11 HBC capacitive mode regulation, CMR (HB pin) The MOSFETs in the half-bridge drive the resonant circuit. Depending on the output load, the output voltage and the switching frequency this resonant circuit can have an inductive or a capacitive impedance. Inductive impedance is preferred because it facilitates efficient zero-voltage switching. Harmful switching in capacitive mode is avoided using the adaptive non-overlap time function (see Section 7.8.4.2). An extra action is performed which results in Capacitive Mode Regulation (CMR). CMR causes the half-bridge circuit to return to Inductive mode from Capacitive mode. Fig 18. Overcurrent regulation during start-up Iocr -Iocr ICur(HBC) Iss(hf)(SSHBC) Iss(If)(SSHBC) -Iss(If)(SSHBC) -Iss(hf)(SSHBC) ISSHBC/EN VSSHBC/EN Vfmin(SSHBC) Vss(hf-lf)(SSHBC) Vfmax(SSHBC) VO Vreg 0 0 0 t t t t Fast soft start sweep (charge and discharge) Slow soft start sweep (charge and discharge) 014aaa866 |
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