AD73322AST datasheet(28/43 Pages) AD

28 / 43 page

AD73322

–28–

REV. B

The device features an on-chip master clock divider circuit that

allows the sample rate to be reduced as the sampling rate of the

sigma-delta converter is proportional to the output of the MCLK

Divider (whose default state is divide by 1).

The decimator’s frequency response (Sinc3) gives some pass-

band attenuation (up to FS/2) which continues to roll off above

the Nyquist frequency. If it is required to implement a digital

filter to create a sharper cutoff characteristic, it may be prudent

to use an initial sample rate of greater than twice the Nyquist

rate in order to avoid aliasing due to the smooth roll-off of the

Sinc3 filter response.

In the case of voiceband processing where 4 kHz represents the

Nyquist frequency, if the signal to be measured were externally

bandlimited then an 8 kHz sampling rate would suffice. How-

ever if it is required to limit the bandwidth using a digital filter,

then it may be more appropriate to use an initial sampling rate

of 16 kHz and to process this sample stream with a filtering and

decimating algorithm to achieve a 4 kHz bandlimited signal at

an 8 kHz rate. Figure 23 details the initial 16 kHz sampled tone.

FREQUENCY – Hz

1000

–20

–40

–60

–80

–100

–120

2000

3000

4000

5000

6000

7000

8000

–140

Figure 23. FFT (ADC 16 kHz Direct Sampling)

Figure 24 details the spectrum of the final 8 kHz sampled fil-

tered tone.

FREQUENCY – Hz

500

–20

–40

–60

–80

–100

–120

1000

1500

2000

2500

3000

3500

4000

–140

Figure 24. FFT (ADC 8 kHz Filtered and Decimated from

16 kHz)

Encoder Group Delay

When programmed for high sampling rates, the AD73322 offers

a very low level of group delay, which is given by the following

relationship:

Group Delay (Decimator) = Order

× ((M – 1)/2) × T

DEC

where:

Order is the order of the decimator (= 3),

M is the decimation factor (= 32 @ 64 kHz, = 64 @ 32 kHz,

= 128 @ 16 kHz , = 256 @ 8 kHz) and

TDEC is the decimation sample interval (= 1/2.048e6) (based

on DMCLK = 16.384 MHz) => Group Delay (Decimator @

64 kHz) = 3

× (32 – 1)/2 × (1/2.048e6) = 22.7 µs

If final filtering is implemented in the DSP, the final filter’s

group delay must be taken into account when calculating overall

group delay.

Decoder Section

The decoder section updates (samples) at the same rate as the

encoder section. This rate is programmable as 64 kHz, 32 kHz,

16 kHz or 8 kHz (from a 16.384 MHz MCLK). The decoder

section represents a reverse of the process that was described in

the encoder section. In the case of the decoder section, signals

are applied in the form of samples at an initial low rate. This

sample rate is then increased to the final digital sigma-delta

modulator rate of DMCLK/8 by interpolating new samples

between the original samples. The interpolating filter also has the

action of canceling images due to the interpolation process using

spectral nulls that exist at integer multiples of the initial sam-

pling rate. Figure 25 shows the spectral response of the decoder

section sampling at 64 kHz. Again, its sigma-delta modulator

shapes the noise so it is reduced in the voice bandwidth dc–

4 kHz. For improved voiceband SNR, the user can implement

an initial anti-imaging filter, preceded by 8 kHz to 64 kHz inter-

polation, in the DSP.

FREQUENCY – Hz

0.5

–20

1.0

1.5

2.0

2.5

3.0

3.5

–100

–10

–30

–40

–50

–60

–70

–80

–90

104

Figure 25. FFT (DAC 64 kHz Sampling)

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