SDA datasheet(27/29 Pages) EXAR

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Rev. 1.0.1

Short duration Enable pin toggled low

Short duration shutdown pulses to the

ENABLE pin of the XRP7724 which does not

provide sufficient time for the LDO5 voltage

to fall below 3.5V can result in significant

delay in re-enabling of the device.

Some

examples below show LDO5 and ENABLE

pins:

No load on LDO5, blue trace. Recovery time

after ENABLE logic high is approximately

40ms.

Adding a 200 ohm load on LDO5 pulls voltage

below 3.5V and restart is short.

Note that as VCC increases, the restart time

falls as well. 5.5V input is shown as the worst

case.

Since the ENABLE pin has an internal current

source, a simple open drain pull down is the

recommended

way

shut

down

the

XRP7724. A diode in series with a resistor

between the LDO5 and ENABLE pins may

offer a way to more quickly pull down the

LDO5 output when the ENABLE pin is pulled

low.

APPLICATION INFORMATION

THERMAL DESIGN

As a 4 channel controller with internal

MOSFET drivers and 5V gate drive supply all

in one 7x7mm 44pin TQFN package, there is

the potential for the power dissipation to

exceed the package thermal limitations. The

XRP7724 has an internal LDO which supplies

5V to the internal circuitry and MOSFET

drivers during startup.

It is generally

expected that either one of the switching

regulator outputs is 5V or another 5V rail is

available in the system and connected to the

5V EXT pin. If there is no 5V available in the

system, then the power loss will increase

significantly

and

proper

thermal

design

becomes critical.

For lower power levels

using properly sized MOSFETs, the use of the

internal 5V regulator as a gate drive supply is

considered appropriate.

LAYOUT GUIDELINES

Refer to application note ANP-32 “Practical

Layout Guidelines for PowerXR Designs”.

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