ACE5372

Low Power Real-Time Clock (RTC)

VER 1.3

24

Periodic (Clock) Interrupt

The

INTRA (INTRB) pin output, the periodic interrupt cycle select bits (CT2, CT1, CT0) and the

interrupt output select bits (SL2, SL1) can be used to interrupt the CPU in a certain cycle. The periodic

interrupt cycle select bits can be used to select either one of two interrupt output modes: the pulse mode

and the level mode.

1) Pulse mode:

Output 2Hz, 1Hz clock pulses. For relationships with counting up of seconds see the

diagram below.

In the 2Hz clock pulse mode, 0.496s clock pulses and 0.504s clock pulse are output

alternatively.

Duty cycle for 1Hz clock pulses becomes 50.4%.

2)

Level mode: One second, one minute one month may be selected for an interrupt cycle.

Counting up of seconds is matched with falling edge of interrupt output.

3) When the time trimming circuit is used, periodic interrupt cycle changes every 20 seconds.

Pulse mode: “L” duration of output pulses may change in the maximum range of ±3.784ms

(±3.875ms when 32KHz crystal is used)

CT2

CT1

CT0

Description

Wave Form Mode

Cycle and INTRA(INTRB) Falling Timing

0

0

0

-

INTRA（INTRB）OFF (Default)

0

0

1

-

INTRA（INTRB）

fixed at “L”

0

1

0

Pulse Mode

2Hz (Duty 50%)

0

1

1

Pulse Mode

1Hz (Duty 50%)

1

0

0

Level Mode

Every second (coincident with second count-up)

1

0

1

Level Mode

Every minute (00 second of every minute)

1

1

0

Level Mode

Every hour (00minute 00second of every hour)

1

1

1

Level Mode

Every month (1st day, 00:00:00 a.m.of every month)