WM8983GEFLSLASHV datasheet(22/124 Pages) WOLFSON

номер детали	WM8983GEFL/V

подробное описание детали	Mobile Multimedia CODEC with 1W Speaker Driver

PDF	124 Pages

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производитель	WOLFSON [Wolfson Microelectronics plc]

домашняя страница	http://www.wolfsonmicro.com

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WM8983

Production Data

PD, Rev 4.3, May 2010

INTERNAL POWER ON RESET CIRCUIT

Figure 10 Internal Power on Reset Circuit Schematic

The WM8983 includes an internal Power-On-Reset Circuit, as shown in Figure 10, which is used

reset the digital logic into a default state after power up. The POR circuit is powered from AVDD1

and monitors DCVDD. It asserts PORB low if AVDD1 or DCVDD is below a minimum threshold.

Figure 11 Typical Power up Sequence where AVDD1 is Powered before DCVDD

Figure 11 shows a typical power-up sequence where AVDD1 comes up first. When AVDD1 goes

above the minimum threshold, Vpora, there is enough voltage for the circuit to guarantee PORB is

asserted low and the chip is held in reset. In this condition, all writes to the control interface are

ignored. Now AVDD1 is at full supply level. Next DCVDD rises to Vpord_on and PORB is released high

and all registers are in their default state and writes to the control interface may take place.

On power down, where AVDD1 falls first, PORB is asserted low whenever AVDD1 drops below the

minimum threshold Vpora_off.

WM8983GEFL/V датащи(PDF) 22 Page - Wolfson Microelectronics plc