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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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WM8983GEFL/V датащи(PDF) 39 Page - Wolfson Microelectronics plc |
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WM8983GEFL/V датащи(HTML) 39 Page - Wolfson Microelectronics plc |
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39 / 124 page  Production Data WM8983 w PD, Rev 4.3, May 2010 39 Figure 21 Microphone Bias Schematic ANALOGUE TO DIGITAL CONVERTER (ADC) The WM8983 uses stereo multi-bit, oversampled sigma-delta ADCs. The use of multi-bit feedback and high oversampling rates reduces the effects of jitter and high frequency noise. The ADC Full Scale input level is proportional to AVDD1. With a 3.3V supply voltage, the full scale level is 1.0Vrms. Any voltage greater than full scale may overload the ADC and cause distortion. ADC DIGITAL FILTERS The ADC filters perform true 24 bit signal processing to convert the raw multi-bit oversampled data from the ADC to the correct sampling frequency to be output on the digital audio interface. The digital filter path for each ADC channel is illustrated in Figure 22. Figure 22 ADC Digital Filter Path The ADCs are enabled by the ADCENL/R register bit. REGISTER ADDRESS BIT LABEL DEFAULT DESCRIPTION R2 Power management 2 0 ADCENL 0 Enable ADC left channel: 0 = ADC disabled 1 = ADC enabled 1 ADCENR 0 Enable ADC right channel: 0 = ADC disabled 1 = ADC enabled Table 13 ADC Enable Control AGND1 MBVSEL=0 MICBIA = 1.8 x VMID = 0.9 X AVDD1 VMI internal resistor internal resistor MICBE MBVSEL=1 MICBIA = 1.3 x VMID = 0.65 X AVDD1 |
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