WM8976CGEFLSLASHV datasheet(77/114 Pages) WOLFSON

77 / 114 page

Production Data

WM8976

PD, Rev 4.5, November 2011

The VMID_EN signal has an OR function performed with the normal VMID driver enable. If the

VMID_EN signal is to have no effect to normal functionality when jack detection is enabled, it should

set to 0 for all JD_EN0 or JD_EN1 settings.

If jack detection is not enabled (JD_EN=0), the output enables default to all 1’s, allowing the outputs

to be controlled as normal via the normal output enables found in Table 51.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

GPIO control

JD_SEL

Pin selected as jack detection input

0 = GPIO1

1 = GPIO2

Reserved

JD_EN

Jack Detection Enable

0 = disabled

1 = enabled

8:7

JD_VMID

[7] VMID_EN_0

[8] VMID_EN_1

R13

3:0

JD_EN0

0000

Output enables when selected jack

detection input is logic 0.

[0]= OUT1_EN_0

[1]= OUT2_EN_0

[2]= OUT3_EN_0

[3]= OUT4_EN_0

7:4

JD_EN1

0000

Output enables when selected jack

detection input is logic 1

0000-0011 = Reserved

[4]= OUT1_EN_1

[5]= OUT2_EN_1

[6]= OUT3_EN_1

[7]= OUT4_EN_1

Table 63 Jack Detect Register Control Bits

CONTROL INTERFACE

SELECTION OF CONTROL MODE AND 2-WIRE MODE ADDRESS

The control interface can operate as either a 3-wire or 2-wire MPU interface. The MODE pin

determines the 2 or 3 wire mode as shown in Table 64.

The WM8976 is controlled by writing to registers through a serial control interface. A control word

consists of 16 bits. The first 7 bits (B15 to B9) are address bits that select which control register is

accessed. The remaining 9 bits (B8 to B0) are register bits, corresponding to the 9 bits in each control

MODE

INTERFACE FORMAT

Low

2 wire

High

3 wire

Table 64 Control Interface Mode Selection

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