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SPEAR300 датащи(PDF) 23 Page - STMicroelectronics |
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SPEAR300 датащи(HTML) 23 Page - STMicroelectronics |
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23 / 83 page ![]() SPEAr300 Architecture overview Doc ID 16324 Rev 2 23/83 2.22 Camera interface The camera interface receives data from a sensor in parallel mode (8 to 14-bits) by storing a full line in a buffer memory, then requesting a DMA transfer or interrupting the processor. When all the lines of a frame are transferred, a frame sync interrupt is generated. Main features: ● Supports both hardware synchronization (HSYNC and VSYNC signals) and embedded synchronization (ITU656 or CSI2). ● Data carried by the bus can be: – Raw Bayer10 (10-14 bits/pixel – 2 Bytes), Raw Bayer8 (8 bits/pixel – 1 Byte), – YCbCr400 (1 Byte/pixel – 1 Byte), YCbCr422 (4 Bytes/ 2 pixels – 2*2 Bytes), YCbCr444 (3 Bytes/ pixel – 4 Bytes) – RGB444 (2 Bytes/ pixel – 2 Bytes), RGB565 (2 Bytes/ pixel – 2 Bytes), RGB888 (3 Bytes/ pixel – 4 Bytes) – JPEG compressed ● Data is stored in a 2048 x 32 buffer memory ● The camera interface can be assigned to two different set of pins. When using data greater than 8-bits, it is not possible to use the MII interface. ● Max pixel clock frequency is 100 MHz |
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