STLC3075_09 datasheet(6/36 Pages) STMICROELECTRONICS

6 / 36 page

Pin description

STLC3075

6/36

Pin description

Figure 2.

Pin connection (top view)

N.C.

GAIN SET

RTTX

CTTX2

CTTX1

DET

CKTTX

RLIM

AGND

CVCC

RSENSE

GATE

CLK

VPOS

ILTF

IREF

RTH

D00TL488

Table 2.

Pin description

N°

Function

Control interface: input bit 0

Control interface: input bit 1

Control interface: input bit 2

Power down input. Normally connected to CVCC (or to logic level high)

Gain SET

Control gain interface: 0 Level Rxgain = 0dB Txgain = -12dB

1 Level Rxgain = +6dB Txgain = -12dB

6, 22, 38,

39, 40, 42

Not connected

DET

Logic interface output of the supervision detector (active low)

CKTTX

Metering pulse clock input (12 kHz or 16 kHz square wave)

CTTX1

Metering burst shaping external capacitor

CTTX2

Metering burst shaping external capacitor

RTTX

Metering pulse cancellation buffer output. TTX filter network should be connected to

this point. If not used, should be left open.

FTTX

Metering pulse buffer input this signal is sent to the line and used to perform TTX

filtering

4 wires input port (RX input). A 100 k

Ω external resistor must be connected to AGND

via the bias input stage. This signal refers to AGND. If connected to single supply

CODEC output it must be DC decoupled with proper capacitor.

ZAC1

RX buffer output (the AC impedance is connected from this node to ZAC)

ZAC

AC impedance synthesis

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