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TM16ER72LP датащи(PDF) 1 Page - Texas Instruments |
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TM16ER72LP датащи(HTML) 1 Page - Texas Instruments |
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1 / 14 page ![]() TM16ER72HP 16777216 BY 72BIT TM16ER72LP 16777216 BY 72BIT EXTENDEDDATAOUT BUFFERED DYNAMIC RAM MODULES SMMS694 − AUGUST 1997 1 POST OFFICE BOX 1443 • HOUSTON, TEXAS 77251−1443 D Organization − TM16ER72HP-xx ...16 777 216 × 72 Bits − TM16ER72LP-xx ...16 777 216 × 72 Bits D Single 3.3-V Power Supply ( ±10% Tolerance) D JEDEC 168-Pin Dual-In-Line Memory Module (DIMM) With Buffer for Use With Socket D TM16ER72xP-xx — Uses 18 64M-Bit High-Speed (16M ×4-Bit) Dynamic RAMs D High-Speed, Low-Noise LVTTL Interface D High-Reliability 32-Lead 400-Mil-Wide Surface-Mount Thin Small-Outline Package (TSOP) (DGE Suffix) D Intended for Workstation/Server Applications D Long Refresh Periods: − TM16ER72HP: 64 ms (4 096 Cycles) − TM16ER72LP: 64 ms (8 192 Cycles) D 3-State Output D Extended-Data-Out (EDO) Operation With CAS-Before-RAS (CBR), RAS-Only, and Hidden Refresh D Ambient Temperature Range 0 °C to 70°C D Gold-Plated Contacts D Performance Ranges ACCESS ACCESS ACCESS EDO TIME TIME TIME CYCLE tRAC tCAC tAA tHPC (MAX) (MAX) (MAX) (MIN) ’16ER72xx-40 40 ns 11 ns 20 ns 16 ns ’16ER72xx-50 50 ns 13 ns 25 ns 20 ns ’16ER72xx-60 60 ns 15 ns 30 ns 25 ns description The TM16ER72HP is a 128M-byte, 168-pin, buffered dual-in-line memory module (DIMM). The DIMM is composed of eighteen TMS465409, 16 777 216 × 4-bit 4K-refresh EDO dynamic random-access memories (DRAMs), each in a 400-mil, 32-pin plastic thin small-outline package (TSOP) (DGE suffix), and two SN74LVC162244 16-bit buffers, each in a 48-lead plastic TSOP package mounted on a substrate with decoupling capacitors. See the TMS465409 data sheet (literature number SMKS895). The TM16ER72LP is a 128M-byte, 168-pin, buffered DIMM. The DIMM is composed of eighteen TMS464409, 16 777 216 × 4-bit 8K-refresh EDO DRAMs, each in a 400-mil, 32-pin plastic TSOP (DGE suffix), and two SN74LVC162244 16-bit buffers, each in a 48-lead plastic TSOP package mounted on a substrate with decoupling capacitors. See the TMS465409 data sheet (literature number SMKS895). These modules are intended for multimodule workstation / server applications where buffering is needed for address and control signals. Two copies of address 0 (A0 and B0) are defined to allow maximum performance for 4-byte applications that interleave between two 4-byte banks. A0 is common to the DRAMs used for DQ0−DQ31, while B0 is common to the DRAMs used for DQ32−DQ63. operation The TM16ER72xP operates as eighteen TMS46x409s that are connected as shown in the TM16ER72xP functional block diagram. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 1997, Texas Instruments Incorporated PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. |
Аналогичный номер детали - TM16ER72LP |
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Аналогичное описание - TM16ER72LP |
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