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TPS70751MPWPREP датащи(PDF) 5 Page - Texas Instruments |
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TPS70751MPWPREP датащи(HTML) 5 Page - Texas Instruments |
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5 / 41 page ![]() www.ti.com DETAILED DESCRIPTION Pin Functions TPS70751-EP DUAL-OUTPUT LOW-DROPOUT VOLTAGE REGULATOR WITH POWER-UP SEQUENCING FOR SPLIT-VOLTAGE DSP SYSTEMS SLVS718 – DECEMBER 2006 TERMINAL FUNCTIONS TERMINAL I/O DESCRIPTION NAME NO. EN 6 I Active-low enable GND 8 Ground MR1 4 I Manual reset 1. Active low, pulled up internally. MR2 5 I Manual reset 2. Active low, pulled up internally. NC 1, 11, 20 No connection Power good. Open-drain output, low when VOUT1 voltage is less than 95% of the nominal PG1 16 O regulated voltage. RESET 15 O Reset. Open-drain output, SVS (power-on reset) signal, active low. Power up sequence control: SEQ = High, VOUT2 powers up first; SEQ = Low, VOUT1 powers SEQ 7 I up first, SEQ terminal pulled up internally. VIN1 2, 3 I Regulator 1 input voltage VIN2 9, 10 I Regulator 2 input voltage VOUT1 18, 19 O Regulator 1 output voltage VOUT2 12, 13 O Regulator 2 output voltage VSENSE1/FB1 17 I Regulator 1 output voltage sense/feedback 1 VSENSE2/FB2 14 I Regulator 2 output voltage sense/feedback 2 The TPS707xx low-dropout regulator family provides dual regulated output voltages for DSP applications that require a high-performance power-management solution. These devices provide fast transient response and high accuracy with small output capacitors, while drawing low quiescent current. Programmable sequencing provides a power solution for DSPs, without any external component requirements. This reduces the component cost and board space while increasing total system reliability. The TPS707xx family has an enable feature that puts the device in sleep mode, reducing the input currents to less than 3 µA. Other features are integrated SVS (power-on reset, RESET) and power good (PG1) that monitor output voltages and provide logic output to the system. These differentiated features provide a complete DSP power solution. The TPS70751, unlike many other LDOs, features very low quiescent current that remains virtually constant even with varying loads. Conventional LDO regulators use a PNP pass element, the base current of which is directly proportional to the load current through the regulator (IB = IC/β). The TPS70751 uses a PMOS transistor to pass current; because the gate of the PMOS is voltage driven, operating current is low and stable over the full load range. Enable (EN) The EN terminal is an input that enables or shuts down the device. If EN is at a voltage high signal, the device is in shutdown mode. When EN goes to voltage low, the device is enabled. Sequence (SEQ) The SEQ terminal is an input that programs which output voltage (VOUT1 or VOUT2) is turned on first. When the device is enabled and the SEQ terminal is pulled high or left open, VOUT2 turns on first and VOUT1 remains off until VOUT2 reaches approximately 83% of its regulated output voltage. At that time, the VOUT1 is turned on. If VOUT2 is pulled below 83% (i.e., overload condition), VOUT1 is turned off. This terminal has a 6-µA pullup current to VIN1. Pulling SEQ low reverses the power-up order and VOUT1 is turned on first. For detailed timing diagrams, see Figure 33 and Figure 38. 5 Submit Documentation Feedback |
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