Buck Converter

SW3

VIN1

Control

Logic

FB2

Current

Comparator

Error

Amplifier

N-MOS

SW4

VIN2

CurrentSampling

&

SlopeCompenation

1.24 V

1.24 V

+ 15%

Overvoltage

Comparator

750 kHz

Oscillator

Logic

Clock / 2

Clock / 4

Clock

Clockselectionforshortcircuit

andSoftstart

0.8 V

0.4 V

CurrentLimit

&

Softstart

Soft-Start (Buck Converter)

Buck Converter Design Procedure

TPS65166

The non-synchronous current mode buck converter operates at fixed frequency PWM operation. The converter

drives an internal N-channel MOSFET switch with an internal bootstrap capacitor. The output voltage can be set

between 2.5V and 3.3V by an external feedback divider. If the feedback voltage FB2 is 15% above the reference

voltage of 1.24V the converter stops switching and starts switching again if the FB2 voltage falls below the

threshold. For 3.3V output voltage the overvoltage lockout is approximately 3.8 V.

Figure 26. Buck Converter Block Diagram

To avoid high inrush current during start-up, an internal soft-start is implemented. When the buck converter is

enabled, its current limit is reduced and it slowly rises (1ms to 2ms) to the switch current limit. For further inrush

The soft-start is typically completed in 1ms to 2ms.

The first step in the design procedure is to verify whether the maximum possible output current of the buck

converter supports the specific application requirements. To simplify the calculation, the fastest approach is to

estimate the converter efficiency by taking the efficiency numbers from the provided efficiency curves or to use a

worst case assumption for the expected efficiency, e.g., 80%. The calculation must be for the maximum assumed

input voltage where the peak switch current is the highest. The inductor and external Schottky diode have to be

able to handle this current.

Copyright © 2009, Texas Instruments Incorporated

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