SN8P1602AS datasheet(69/94 Pages) SONIX

69 / 94 page

SN8P1600

8-bit micro-controller

SONiX TECHNOLOGY CO., LTD

Page 69

Revision 1.94

TC0/TC1 INTERRUPT OPERATION

When the TC0C/TC1C counter occurs overflow, the TC0IRQ/TC1IRQ will be set to “1” however the TC0IEN/TC1IEN is

enable or disable. If the TC0IEN = 1, the trigger event sets the TC0IRQ/TC1IRQ to be “1” and the system into interrupt

0vector. If the TC0IEN/TC1IEN = 0, the trigger event will make the TC0IRQ/TC1IEN to be “1” but the system not into

interrupt vector. Users need to care the operation under multi-interrupt situation.

Example: TC0 interrupt request setup.

B0BCLR

FTC0IEN

; Disable TC0 interrupt service

B0BCLR

FTC0ENB

; Disable TC0 timer

MOV

A, #20H

;

B0MOV

TC0M, A

; Set TC0 clock = Fcpu / 64

MOV

A, #74H

; Set TC0C initial value = 74H

B0MOV

TC0C, A

; Set TC0 interval = 10 ms

B0BSET

FTC0IEN

; Enable TC0 interrupt service

B0BCLR

FTC0IRQ

; Clear TC0 interrupt request flag

B0BSET

FTC0ENB

; Enable TC0 timer

B0BSET

FGIE

; Enable GIE

Example: TC0 interrupt service routine.

ORG

; Interrupt vector

JMP

INT_SERVICE

INT_SERVICE:

B0XCH

A, ACCBUF

; Store ACC value.

B0MOV

A, PFLAG

B0MOV

PFLAGBUF, A

B0BTS1

FTC0IRQ

; Check TC0IRQ

JMP

EXIT_INT

; TC0IRQ = 0, exit interrupt vector

B0BCLR

FTC0IRQ

; Reset TC0IRQ

MOV

A, #74H

B0MOV

TC0C, A

; Reset TC0C.

; TC0 interrupt service routine

EXIT_INT:

B0MOV

A, PFLAGBUF

B0MOV

PFLAG, A

B0XCH

A, ACCBUF

; Restore ACC value.

RETI

; Exit interrupt vector

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