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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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SN8P1602AS датащи(PDF) 36 Page - SONiX Technology Company |
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SN8P1602AS датащи(HTML) 36 Page - SONiX Technology Company |
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36 / 94 page  SN8P1600 8-bit micro-controller SONiX TECHNOLOGY CO., LTD Page 36 Revision 1.94 5 5 5 SYSTEM REGISTER OVERVIEW The RAM area located in 80H~FFH bank 0 is system register area. The main purpose of system registers is to control peripheral hardware of the chip. Using system registers can control I/O ports, timers and counters by programming. The memory map provides an easy and quick reference source for writing application program. These system registers accessing is controlled by the selected memory bank (RBANK = 0) or the bank 0 read/write instruction (B0MOV, B0BSET, B0BCLR…). SYSTEM REGISTER ARRANGEMENT (BANK 0) BYTES of SYSTEM REGISTER SN8P1602/1603 0 1 2 3 4 5 6 7 8 9 A B C D E F 8 - - R Z Y - PFLAG - - - - - - - - - 9 - - - - - - - - - - - - - - - - A - - - - - - - - - - - - - - - - B - - - - - - - - - - - - - - - - C P1W P1M P2M - - - - - INTRQ INTEN OSCM - - - PCL PCH D P0 P1 P2 - - - - - - - TC0M TC0C - - - STKP E - - - - - - - @YZ - - - - - - - - F - - - - - - - - STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H SN8P1604 0 1 2 3 4 5 6 7 8 9 A B C D E F 8 - - R Z Y - PFLAG - - - - - - - - - 9 - - - - - - - - - - - - - - - - A - - - - - - - - - - - - - - - - B - - - - - - - - - - - - - - - - C P1W P1M P2M - - P5M - - INTRQ INTEN OSCM - - - PCL PCH D P0 P1 P2 - - P5 - - - - - - TC1M TC1C TC1R STKP E - - - - - - - @YZ - - - - - - - - F - - - - - - - - STK3L STK3H STK2L STK2H STK1L STK1H STK0L STK0H Description PFLAG = ROM page and special flag register. R = Working register and ROM look-up data buffer. P1W = Port 1 Wakeup register. Y, Z = Working, @YZ and ROM addressing register. PnM = Port n input/output mode register. Pn = Port n data buffer. INTRQ = Interrupt request register. INTEN = Interrupt enable register. OSCM = Oscillator mode register. PCH, PCL = Program counter. TCnM = Timer n mode register. TCnC = Timer n counting register. STKP = Stack pointer buffer. TC1R= TC1 8-bit reload register. @YZ = RAM YZ indirect addressing index pointer. STK0~STK3 = Stack 0 ~ stack 3 buffer. Note: a). All register names had been declared in SN8ASM assembler. b). 1-bit register name had been declared in SN8ASM assembler with “F” prefix code. c). When using instruction to check empty location, logic “H” will be returned. d). “b0bset”, “b0bclr”, ”bset”, ”bclr” instructions only support “R/W” registers. |
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