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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ADS5294IPFPR датащи(PDF) 1 Page - Texas Instruments |
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ADS5294IPFPR датащи(HTML) 1 Page - Texas Instruments |
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1 / 67 page  ADS5294 www.ti.com SLAS776B – NOVEMBER 2011 – REVISED JULY 2012 Octal Channel 14-Bit, 80 MSPS High-SNR and Low-Power ADC Check for Samples: ADS5294 1 FEATURES DESCRIPTION Using CMOS process technology and innovative • Maximum Sample Rate: 80 MSPS/14-Bit circuit techniques, the ADS5294 is a low power • High Signal-to-Noise Ratio 80MSPS 8-Channel ADC. Low power consumption, – 75.5-dBFS SNR at 5 MHz/80 MSPS high SNR, low SFDR, and consistent overload recovery allow users to design high performance – 78.2-dBFS SNR at 5 MHz/80 MSPS and systems. Decimation Filter Enabled The ADS5294 has a digital processing block that – 84-dBc SFDR at 5 MHz/80 MSPS integrates several commonly used digital functions for • Low Power Consumption improving system performance. It includes a digital – 58 mW/CH at 50 MSPS filter module that has built-in decimation filters (with – 77 mW/CH at 80 MSPS (2 LVDS Wire Per low-pass, high-pass and band-pass characteristics). The decimation rate is also programmable (by 2, by Channel) 4, or by 8). This makes it useful for narrow-band • Digital Processing Block applications, where the filters can be used – Programmable FIR Decimation Filter and conveniently to improve SNR and knock-off Oversampling to Minimize Harmonic harmonics, while at the same time reducing the Interference output data rate. The device includes an averaging mode where two channels (or even four channels) – Programmable IIR High Pass Filter to can be averaged to improve SNR. Minimize DC Offset Serial LVDS outputs reduce the number of interface – Programmable Digital Gain: 0 dB to 12 dB lines and enable the highest system integration. The – 2- or 4- Channel Averaging digital data from each channel ADC can be output • Flexible Serialized LVDS Outputs: over one or two wires of LVDS output lines – One or Two Wires of LVDS Output Lines depending on the ADC sampling rate. This 2-wire interface helps keep the serial data rate low, allowing per Channel Depending on ADC Sampling low cost FPGA based receivers to be used even at Rate high sample rate. The ADC resolution can be – Programmable Mapping Between ADC programmed to 12 bit or 14 bit through registers. A Input Channels and LVDS Output Pins- very unique feature is the programmable mapping Eases Board Design module that allows flexible mapping between the – Variety of Test Patterns to Verify Data input channels and the LVDS output pins. This helps greatly reduce the complexity of LVDS output routing Capture by FPGA/Receiver and can potentially result in cheaper system boards • Internal and External References by reducing the number of PCB layers. • 1.8V Operation for Low Power Consumption The device integrates an internal reference trimmed • Low-Frequency Noise Suppression to accurately match across devices. Best • Recovery From 6-dB Overload within 1 Clock performance is expected to be achieved through the Cycle internal reference mode. The device can be driven with external references as well. • Package: 12-mm × 12-mm 80-Pin QFP The device is available in a 12 mm × 12 mm 80-pin APPLICATIONS QFP. It is specified over a –40°C to 85°C operating temperature range. ADS5294 is completely pin-to-pin • Ultrasound Imaging and register compatible to ADS5292. • Communication Applications • Multi-channel Data Acquisition 1 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PRODUCTION DATA information is current as of publication date. Copyright © 2011–2012, Texas Instruments Incorporated Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. |
Аналогичный номер детали - ADS5294IPFPR |
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Аналогичное описание - ADS5294IPFPR |
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