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ADS5294IPFPR датащи(PDF) 44 Page - Texas Instruments

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номер детали ADS5294IPFPR
подробное описание детали  Octal Channel 14-Bit, 80 MSPS High-SNR and Low-Power ADC
PDF  67 Pages
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производитель  TI1 [Texas Instruments]
домашняя страница  http://www.ti.com
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ADS5294IPFPR датащи(HTML) 44 Page - Texas Instruments

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ADCLKp
LCLKp
OUTp
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 00
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 10
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 01
PHASE_DDR<1:0> = 11
ADCLKp
LCLKp
OUTp
PHASE_DDR<1:0> = 10
ADS5294
SLAS776B – NOVEMBER 2011 – REVISED JULY 2012
www.ti.com
Where k is set as described by the HPF_corner registers (one for each channel). Also the HPF_EN bit in each
register needs to be set to enable the HPF feature for each channel.
BIT CLOCK PROGRAMMABILITY
ADDR.
D15
D14
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
NAME
(HEX)
42
X
X
PHASE_DDR<1:0>
46
1
X
EN_SDR
46
1
X
FALL_SDR
The output interface of the ADS5294 is normally a DDR interface, with the LCLK rising edge and falling edge
transitions in the middle of alternate data windows. This default phase is shown in Figure 51.
Figure 51. Default Phase of LCLK
The phase of LCLK can be programmed relative to the output frame clock and data using bits
PHASE_DDR<1:0>. The LCLK phase modes are shown in Figure 52.
Figure 52. Phase Programmability Modes for LCLK
44
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